In the mid-1990s, ULSI technology will reach Sub-Half-Micron Era and Si chips with 0.30.4 µm design rules will be in the market. The shrinked device size makes it possible to realize a device count of more than 107 and a logic speed of 100200 picosecond per gate. By taking full advantage of these advanced process and device technologies, three basic trends; i.e., (a) higher integration and higher performance, (b) "system-on-chip" or system incorporation onto a single chip, and (c) customization, will be accelerated. Memories will include more logic fuctions on a chip and will become system memories. Microprocessors and ASICs will find a wider variety of applications in data processing, in signal processing and in control. It is prospected definitely that ULSI architecture technology, including system technology and circuit technology, will become more and more important for the progress aiming at the sub-half-micron ULSIs. This paper describes the technology issues that are specific for ULSI memories, microprocessors and ASICs. It overviews technology issues that are common to various ULSI chips, covering design, test, fault-tolerant technique, packaging, and high-speed device circuit. A few of future technological issues, such as Cryo-CMOS/BiCMOS and neural network, are briefly discussed with regard to their potentials as the new elements in ULSI architecture.