To improve the data rate in OFDMA-based wireless networks, Carrier Aggregation (CA) technology has been included in the LTE-Advanced standard. Different Carrier Component (CC) capacities of users under the same eNodeB (eNB, i.e. Base Station) make it challenging to allocate resources with CA. In this paper, we jointly consider CC and Resource Block (RB) assignments, and power allocation to achieve proportional fairness in the long term. The goal of the problem is to maximize the overall throughput with fairness consideration. We consider a more general CC assignment framework that each User Equipment (UE) (i.e. Mobile Station) can support any number of CCs. Furthermore, we have proved the problem is NP-hard, even if power is equally allocated to RBs. Thus, first an optimal RB assignment and power allocation algorithm is proposed and then a carrier aggregation enabled joint resource allocation algorithm called CARA is proposed. By jointly considering CC and RB assignments, and power allocation, the proposed approach can achieve better performance. Simulation results show the proposed algorithm can significantly improve performance, e.g., total throughput compared with the existing algorithm.

In a heterogeneous unreliable multiaccess network, wherein terminals share a common wireless channel with distinct error probabilities, existing works have shown that a persistent round-robin (RR-P) scheduling policy can be arbitrarily worse than the optimum in terms of Age of Information (AoI) under standard Automatic Repeat reQuest (ARQ). In this paper, practical Hybrid ARQ (HARQ) schemes which are widely-used in today's wireless networks are considered. We show that RR-P is very close to optimum with asymptotically many terminals in this case, by explicitly deriving tight, closed-form AoI gaps between optimum and achievable AoI by RR-P. In particular, it is rigorously proved that for RR-P, under HARQ models concerning fading channels (resp. finite-blocklength regime), the relative AoI gap compared with the optimum is within a constant of 6.4% (resp. 6.2% with error exponential decay rate of 0.5). In addition, RR-P enjoys the distinctive advantage of implementation simplicity with channel-unaware and easy-to-decentralize operations, making it favorable in practice. A further investigation considering constraint imposed on the number of retransmissions is presented. The performance gap is indicated through numerical simulations.

In this paper, a fifth order curer low-pass filter using as switched-capacitor (SC) architecture is proposed and fabricated with TSMC 0.18 µm CMOS process. A fully differential SC is adopted via the bilinear transform of the corresponding analogue RLC passive prototype. To reach the largest possible input dynamic range and save chip area, the method of dynamic range scaling and minimum capacitor scaling is used. Measured results show that the proposed filter achieves a pass-band of 12.1 MHz with a sampling rate of 100 MHz, a SFDR of 50 dB, a stop-band attenuation greater than 50 dB and a power consumption of 48.5 mW at 1.8 V power supply. Including pads, the chip area occupies 1.515 (1.391.09) mm2. This paper has the feature of low noise, excellent linearity of the filter, and high stability. The experimental results show that it has perfect performance for WiMAX applications and standard is recommended.

In this paper, we propose a method for robot self-position identification by active sound localization. This method can be used for autonomous security robots working in room environments. A system using an AIBO robot equipped with two microphones and a wireless network is constructed and used for position identification experiments. Differences in arrival time to the robot's microphones are used as localization cues. To overcome the ambiguity of front-back confusion, a three-head-position measurement method is proposed. The position of robot can be identified by the intersection of circles restricted using the azimuth differences among different sound beacon pairs. By localizing three or four loudspeakers as sound beacons positioned at known locations, the robot can identify its position with an average error of 7 cm in a 2.53.0 m2 working space in the horizontal plane. We propose adjusting the arrival time differences (ATDs) to reduce the errors caused when the sound beacons are high mounted. A robot navigation experiment was conducted to demonstrate the effectiveness of the proposed position-identification system.

Distributed power delivery is blooming in SoC power system because the fine-grained power management needs separate power sources to adjust each voltage island dynamically. In addition, dedicated power sources for critical circuit blocks can achieve better signal integrity. To extensively utilize the power modules when they are redundant and idle, this work applies the cooperation concept in SoC power management. The key controller is a mixed-signal estimator that executes the intelligent procedures, like real-time swap the power module depending on its loading and healthy condition, automatically configure the power system with phase interleaving, and support all the peripheral functions. To demonstrate the proposed concept, a prototype chip for voltage down-conversion is implemented. This chip contains four switched-inductor converter modules to emulate the cooperative power network. Each module is small therefore the power efficiency is not optimal for the heavy load. With the cooperation between power modules, the power efficiency is 88% for 300mA load, that is 8.5% higher than the single module operation.

A 5.6-GHz 1-V balanced LC-tank Colpitts voltage controlled oscillator is designed and implemented with a TSMC 0.18-µm CMOS process. This proposed Colpitts VCO circuit adopts two single-ended complementary LC-tank VCOs coupled by two pairs of varactors. The proposed VCO operates at low power consumption because it has the same dc current path as the np-MOSFETs. The Measured results of the proposed VCO achieve tuning range of 670 MHz from 5.23 to 5.9 GHz while the controlled voltage is tuned from 0 to 1-V, phase noise of -118.8 dBc/Hz at 1 MHz offset frequency from the carrier of 5.6 GHz and output power of -10.97 dBm at the supply voltage of 1 V. The power consumption of the core circuit is 1.79 mW and the chip area including pads is 0.451 (0.55 0.82) mm2.