In this paper, we present a new four parameter estimator of sampled sinusoidal signals that does not require iteration. Mathematically, the four parameters (frequency, phase, magnitude, and dc offset) of sinusoidal signals can be obtained when four data points are given. In general, the parameters have to be calculated with iteration since the equations are nonlinear. In this paper, we point out that the four parameters can be obtained analytically if the four data points given are measured using a fixed sampling interval. Analytical expressions for the four parameters are derived using the signal differences. Based on this analysis, we suggest an algorithm of estimating the four parameters from N data samples corrupted by noise without iteration. When comparing with the IEEE-1057 method which is based on the least-square method, the proposed algorithm does not require the initial guess of the parameters for iteration and avoid the convergence problem. Also, the number of required numerical operations for estimation is fixed if N is determined. As a result, the processing time of parameter estimation is much faster than the least-square method which has been confirmed by numerical simulations. Simulation results and the quantitative analysis show that the estimation error of the estimated parameters is less than 1.2 times the square root of the Cramer-Rao bounds when the signal to noise ratio is larger than 20dB.

The security level of an internet protocol television (IPTV) digital right management (DRM) system ultimately relies on protection of secret keys. Well known devices for the key protection include smartcards and battery backup SRAMs (BB-SRAMs); however, these devices could be vulnerable to various physical attacks. In this paper, we propose a secure and cost-effective design of a cryptographic system on chip (SoC) that integrates the BB-SRAM with a cell-based design technique. The proposed SoC provides robust safeguard against the physical attacks, and satisfies high-speed and low-price requirements of IPTV set-top boxes. Our implementation results show that the maximum encryption rate of the SoC is 633 Mb/s. In order to verify the data retention capabilities, we made a prototype chip using 0.18 µm standard cell technology. The experimental results show that the integrated BB-SRAM can reliably retain data with a 1.4 µA leakage current.