A number of studies have recently been published concerning chaotic neuron models and asynchronous neural networks having chaotic neuron models. In the case of large-scale neural networks having chaotic neuron models, the neural network should be constructed using analog hardware, rather than by computer simulation via software, due to the high speed and high integration of analog circuits. In the present study, we discuss the circuit structure of a chaotic neuron model, which is constructed on the basis of the mathematical model of an asynchronous chaotic neuron. We show that the pulse-type hardware chaotic neuron model can be constructed on the basis of the mathematical model of an asynchronous chaotic neuron. The proposed model is an effective model for the cell body section of the pulse-type hardware chaotic neuron model for ICs. In addition, we show the bifurcation structure of our composed model, and discuss the bifurcation routes and return maps thereof.

In this paper, we propose the CMOS implementation of a multiple-valued memory cell using -shaped negative-resistance devices. We first propose the construction of a multiple-stable circuit that consists of -shaped negative-resistance devices from four enhancement-mode MOSFETs without a floating voltage source, and connect this in parallel with a unit circuit. It is shown that the movement of -shaped negative-resistance characteristics in the direction of the voltage axis is due to voltage sources. Furthermore, we propose the construction of a multiple-valued memory cell using a multiple-stable circuit. It is shown that it is possible to write and hold data. If the power supply is switched on, it has a feature which enables operation without any electric charge leakage. It is possible, by connecting -shaped negative-resistance devices in parallel, to easily increase the number of multiple values.

In this paper, we propose the CMOS implementation of neuron models for an artificial auditory neural network. We show that when voltage is added directly to the control terminal of the basic circuit of the hardware neuron model, a change in the output firing is observed. Next, based on this circuit, a circuit that changes with time is added to the control terminal of the basic circuit of the hardware neuron model. As a result, a neuron model is constructed with ON firing, adaptation firing, and repetitive firing using CMOS. Furthermore, an improved circuit of a neuron model with OFF firing using CMOS which has been improved from the previous model is also constructed.

Brain subsystems have a high degree of information processing ability using nonlinear dynamics and although various neuron models and artificial neural networks have been investigated, the information processing functions of biological neural networks have not yet been clarified. Recently, various research efforts have confirmed that dendrites perform an important role in brain information processing. In this paper, we discuss the nonlinear characteristics of a hardware active dendrite model, in order to clarify information encoding and transmission via action potentials. That is to say, we show that our proposed model can reproduce the nonlinear characteristics of a biologically active dendrite. First, the hardware active dendrite model we propose is described. We next discuss the response characteristics for pulse stimuli using the model. As a result, when input pulses are applied to an active line, which is the basic structure of the dendrite model, it is shown clearly that backpropagation characteristics are acquired and that the characteristics are qualitatively in agreement with the characteristics of biological dendrites. Furthermore, we verify that the ratio of input to output frequency at the cell body is influenced by the backpropagation characteristics with two branches, which is the simplest structure in the active dendrite model. Thus, with backpropagation characteristics, the possibility that the model can carry out clearly the information processing of biological neural networks, is suggested.