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An analysis of the circuit for dead angle compensation in the dc-to-dc converter controlled by a magnetic amplifier is presented. This circuit suppresses the dead angle so that the core loss may be reduced without spoiling the current surge suppression characteristics of the magnetic amplifier. The analysis is given by modeling the magnetization characteristics of the core containing the saturation inductance and the reverse recovery of the diode. As a result, the control characteristics of the converter with the compensation circuit are expressed analytically and a limit of compensation is derived theoretically.
Tamotsu NINOMIYA Norio MATSUMOTO Koosuke HARADA
The mechanism of noise suppression by a magnetic snubber is analyzed quantitatively. The magnetic snubber is a paralled circuit of a saturable reactor and a linear inductor connected in series with a small diode. The effects of magnetic characteristics of the saturable reactor and the linear inductor on the surge and noise are discussed through the comparison of analytical and experimental results. Then the design method of the magnetic snubber is described.
Kazurou HARADA Hiroshi SAKAMOTO Koosuke HARADA
A novel method of high frequency switching for dc-to-dc converter is presented. This method is based on the commutation with aid of inductor current, where a short interval (dead time) of both switches off is given for removing switching surges and switching losses. By the method of constant current-ripple using a saturable core, the condition of zero voltage switching is made independent of the duty ratio. The output voltage is regulated by pulse width modulation in the same way as that of the conventional converter of PWM control. The mechanism of commutation for giving a dead time is analyzed by assuming equivalent circuits, during which a zero voltage switching is realized. From calculations and experiments, it is found that a desired dead time is derived by connecting external capacitance to the gate-source terminal of the MOSFET.
Masahito SHOYAMA Koosuke HARADA
This paper presents a new type of zero-voltage-switched (ZVS) push-pull dc-dc converter with two synchronous rectifiers in the secondary circuit. ZVS is realized using the magnetizing current of the transformer as a constant current source during the commutation. The output voltage is controlled by PWM with a constant switching frequency. The circuit operation is described using equivalent circuits. The steady-state and dynamic characteristics are analyzed and confirmed experimentally.
Masahito JINNO Po-Yuan CHEN Ming-Shih LIN Katsuaki MURATA Koosuke HARADA
In DC/DC converters with low output voltage and high output current, the technique of synchronous rectification is widely used for improving the output efficiency. However, SR buck converters can experience the abnormal phenomenon called “self turn-on” which will occur in the low-side switch under some circuit conditions. “Self turn-on” is a malfunction of the low-side switch, basically caused by the resonance of the parasitic inductance and the parasitic capacitance. It results in noticeable power dissipation. In this paper, the phenomenon will be clearly described and investigated. With the theoretical analysis and the experimental verification, strategies that can suppress this phenomenon are proposed.
Terukazu SATO Kenji ITAMI Tadao NAKANO Koosuke HARADA
Voltage resonant converters with multiple resonant switches operating at fixed switching frequency are presented. Resonant switches are connected in parallel so that the power conditioning is achieved by the phase-shift modulation method instead of the switching frequency modulation method. Switching losses are predicted to be very small due to it's zero-voltage switching. Steady state characteristics of the proposed converter are analyzed, and the analytical results are verified by experiments.
Tamotsu NINOMIYA Norio MATSUMOTO Masatoshi NAKAHARA Koosuke HARADA
The static and dynamic characteristics of a zero-voltage-switched half-bridge converter are analyzed quantitatively. This converter is controlled by Pulse-Width Modulation with the asymmetrical drive of a pair of semiconductor switches, and. the zoro-voltage switching is maintained by the partial resonance during the OFF interval of both switches. The effects of circuit parameters such as the input capacitance, the resonant inductance and capacitance, and the transformer leakage inductance are discussed through the comparison of analytical and experimental results.
It has been reported that the efficiency of a low voltage power supply is improved by replacing diodes in an output-stage with synchronous rectifiers (SR). A SR consists of a bipolar junction transistor with a low-saturation voltage and a current transformer. Although the SR has low offset-voltage, its reverse recovery characteristic is usually poor. In this paper, an RCD circuit which improves the reverse recovery characteristic of the SR is proposed. This circuit is simple, and it is composed of a diode, a capacitor and a resistor. The analysis and the experimental results of the SR with the proposed RCD circuit are presented. The optimum design of the RCD to improve the reverse recovery characteristic of SR is discussed.
Goichi ARIYOSHI Katsuaki MURATA Koosuke HARADA Kiyomi YAMASAKI
Demand for power in Japan has been increasing year by year, and steep demand is projected during daily peak load periods: particularly in summer, due to growing demand for air conditioning. This has resulted in a large gap between day and night demand for power. The daily and seasonal regularity of this demand gap is placing pressure on power utilities to reduce service costs and create a more dependable power supply. This study demonstrates the feasibility of an energy storage system for load leveling based on the electric double-layer capacitor (EDLC). This device is safer, has a longer service life and needs far less maintenance than the secondary cell. The system works to store surplus energy from a commercial AC line in an EDLC bank during the night, and release this energy for use during the daytime peak load period, using a novel interface circuit. This paper focuses in particular on the working principles and experimental results of the interface circuit, which comprises a voltage control oscillator (VCO), a bi-directional DC/DC converter, a bi- directional inverter, and a coupling inductor. The whole circuit is subjected to PLL control, so that automatic connection between DC from an EDLC bank and AC from a commercial power line may take place in a simpler, more reliable and less costly manner. The system allows for energy transfer on the basis of DC voltage as if electric charging and discharging had taken place in a full DC system.