Author Search Result

[Author] Lingfeng LI(2hit)

1-2hit
  • Content-Based Complexity Reduction Methods for MPEG-2 to H.264 Transcoding

    Shen LI  Lingfeng LI  Takeshi IKENAGA  Shunichi ISHIWATA  Masataka MATSUI  Satoshi GOTO  

     
    PAPER

      Vol:
    E90-D No:1
      Page(s):
    90-98

    The coexistence of MPEG-2 and its powerful successor H.264/AVC has created a huge need for MPEG-2/H.264 video transcoding. However, a traditional transcoder where an MPEG-2 decoder is simply cascaded to an H.264 encoder requires huge computational power due to the adoption of a complicated rate-distortion based mode decision process in H.264. This paper proposes a 2-D Sobel filter based motion vector domain method and a DCT domain method to measure macroblock complexity and realize content-based H.264 candidate mode decision. A new local edge based fast INTRA prediction mode decision method is also adopted to boost the encoding efficiency. Simulation results confirm that with the proposed methods the computational burden of a traditional transcoder can be reduced by 20%30% with only a negligible bit-rate increase for a wide range of video sequences.

  • A Highly Parallel Architecture for Deblocking Filter in H.264/AVC

    Lingfeng LI  Satoshi GOTO  Takeshi IKENAGA  

     
    PAPER-Parallel and/or Distributed Processing Systems

      Vol:
    E88-D No:7
      Page(s):
    1623-1629

    This paper presents a highly parallel architecture for deblocking filter in H.264/AVC. We adopt various parallel schemes in memory sub-system and datapath. A 2-dimensional parallel memory scheme is employed to support efficient parallel access in both horizontal and vertical directions in order to speed up the whole filtering process. This parallel memory also eliminates the need for a transpose circuit. In the datapath, an algorithm optimization is performed to implement parallel filtering with hardware reuse. Pipeline techniques are also adopted to improve the throughput of filtering operations. Our design is implemented under TSMC 0.18 µm technology. Results show that the core size is 0.821.13 mm2 when the maximum frequency is 230 MHz. Compared to other existing architectures, our design has advantages in both speed and area.

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