Author Search Result

[Author] Mamoru SAKAMOTO(1hit)

1-1hit
  • Code Efficiency Evaluation for Embedded Processors

    Morgan Hirosuke MIKI  Mamoru SAKAMOTO  Shingo MIYAMOTO  Yoshinori TAKEUCHI  Toyohiko YOSHIDA  Isao SHIRAKAWA  

     
    PAPER

      Vol:
    E85-A No:4
      Page(s):
    811-818

    This paper evaluates the code efficiency of the ARM, Java, and x86 instruction sets by compiling the SPEC CPU95/CPU2000/JVM98 and CaffeineMark benchmarks, from the aspects of code sizes, basic block sizes, instruction distributions, and average instruction lengths. As a result, mainly because (i) the Java architecture is a stack machine, (ii) there are only four local variables which can be accessed by a 1-byte instruction, and (iii) additional instructions are provided for the network security, the code efficiency of Java turns out to be inferior to that of ARM Thumb. Moreover, through this efficiency analysis it should be stressed that there exists the high potential of constructing a more efficient code architecture by taking minute account of the customization of an instruction set as well as the number of registers.

FlyerIEICE has prepared a flyer regarding multilingual services. Please use the one in your native language.