Author Search Result

[Author] Pei LI(4hit)

1-4hit
  • An Efficiency Optimization Scheme for the Two-Stage Spectrum Sensing in Cognitive Radio Network

    Ying-pei LIN  Chen HE  Ling-ge JIANG  Di HE  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E95-B No:7
      Page(s):
    2489-2493

    A sensing efficiency optimization scheme based on two-stage spectrum sensing that maximizes the achievable throughput of the secondary network and minimizes the average sensing time is proposed in this paper. A selection method for the threshold is proposed and proved to ensure optimal sensing performance. An effective iterative algorithm is presented to solve the constructed efficiency optimization problem.

  • Sampling Set Selection for Bandlimited Signals over Perturbed Graph

    Pei LI  Haiyang ZHANG  Fan CHU  Wei WU  Juan ZHAO  Baoyun WANG  

     
    LETTER-Graphs and Networks

      Vol:
    E103-A No:6
      Page(s):
    845-849

    This paper proposes a sampling strategy for bandlimited graph signals over perturbed graph, in which we assume the edge between any pair of the nodes may be deleted randomly. Considering the mismatch between the true graph and the presumed graph, we derive the mean square error (MSE) of the reconstructed bandlimited graph signals. To minimize the MSE, we propose a greedy-based algorithm to obtain the optimal sampling set. Furthermore, we use Neumann series to avoid the pseudo-inverse computing. An efficient algorithm with low-complexity is thus proposed. Finally, numerical results show the superiority of our proposed algorithms over the other existing algorithms.

  • Low Cost CORDIC-Based Configurable FFT/IFFT Processor for OFDM Systems

    Dongpei LIU  Hengzhu LIU  Botao ZHANG  Jianfeng ZHANG  Shixian WANG  Zhengfa LIANG  

     
    PAPER-OFDM

      Vol:
    E95-A No:10
      Page(s):
    1683-1691

    High-performance FFT processor is indispensable for real-time OFDM communication systems. This paper presents a CORDIC based design of variable-length FFT processor which can perform various FFT lengths of 64/128/256/512/1024/2048/4096/8192-point. The proposed FFT processor employs memory based architecture in which mixed radix 4/2 algorithm, pipelined CORDIC, and conflict-free parallel memory access scheme are exploited. Besides, the CORDIC rotation angles are generated internally based on the transform of butterfly counter, which eliminates the need of ROM making it memory-efficient. The proposed architecture has a lower hardware complexity because it is ROM-free and with no dedicated complex multiplier. We implemented the proposed FFT processor and verified it on FPGA development platform. Additionally, the processor is also synthesized in 0.18 µm technology, the core area of the processor is 3.47 mm2 and the maximum operating frequency can be up to 500 MHz. The proposed FFT processor is better trade off performance and hardware overhead, and it can meet the speed requirement of most modern OFDM system, such as IEEE 802.11n, WiMax, 3GPP-LTE and DVB-T/H.

  • A Two-Stage Spectrum Sensing Scheme Based on Cyclostationarity in Cognitive Radio

    Ying-pei LIN  Chen HE  Ling-ge JIANG  Di HE  

     
    LETTER-Wireless Communication Technologies

      Vol:
    E94-B No:9
      Page(s):
    2681-2684

    A spectrum sensing scheme for cognitive radio that includes coarse and fine sensing stages based on cyclostationarity is proposed in this paper. The cyclostationary feature detection (CFD) based on a single cyclic frequency (SCF) is used in the coarse sensing stage and that based on multiple cyclic frequencies (MCF) is employed in the fine sensing stage. Whether the fine sensing stage is performed or not is decided by comparing the statistic constructed in the coarse sensing stage with two thresholds. Theoretical analyses and simulation results show that the proposed sensing scheme has superior sensing performance and needs shorter sensing time.

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