Reconfigurable intelligent surface (RIS) has the capability of boosting system performance by manipulating the wireless propagation environment. This paper investigates a downlink RIS-aided non-orthogonal multiple access (NOMA) system, where a RIS is deployed to enhance physical-layer security (PLS) in the presence of an eavesdropper. In order to improve the main link's security, the RIS is deployed between the source and the users, in which a reflecting element separation scheme is developed to aid data transmission of both the cell-center and the cell-edge users. Additionally, the closed-form expressions of secrecy outage probability (SOP) are derived for the proposed RIS-aided NOMA scheme. To obtain more deep insights on the derived results, the asymptotic performance of the derived SOP is analyzed. Moreover, the secrecy diversity order is derived according to the asymptotic approximation in the high signal-to-noise ratio (SNR) and main-to-eavesdropper ratio (MER) regime. Furthermore, based on the derived results, the power allocation coefficient and number of elements are optimized to minimize the system SOP. Simulations demonstrate that the theoretical results match well with the simulation results and the SOP of the proposed scheme is clearly less than that of the conventional orthogonal multiple access (OMA) scheme obviously.

Data integrity is a key metric of security for Internet of Things (IoT) which refers to accuracy and reliability of data during transmission, storage and retrieval. Cryptographic hash functions are common means used for data integrity verification. Newly announced SHA-3 is the next generation hash function standard to replace existing SHA-1 and SHA-2 standards for better security. However, its underlying Keccak algorithm is computation intensive and thus limits its deployment on IoT systems which are normally equipped with 32-bit resource constrained embedded processors. This paper proposes two efficient SHA-3 ASIPs based on an open 32-bit RISC-V embedded processor named Z-scale. The first operation-oriented ASIP (OASIP) focuses on accelerating time-consuming operations with instruction set extensions to improve resource efficiency. And next datapath-oriented ASIP (DASIP) targets exploiting advance data and instruction level parallelism with extended auxiliary registers and customized datapath to achieve high performance. Implementation results show that both proposed ASIPs can effectively accelerate SHA-3 algorithm with 14.6% and 26.9% code size reductions, 30% and 87% resource efficiency improvements, 71% and 262% better maximum throughputs as well as 40% and 288% better power efficiencies than reference design. This work makes SHA-3 algorithm integration practical for both low-cost and high-performance IoT systems.

Buffer overflow is one of the main approaches to get control of vulnerable programs. This paper presents a protection technique called BFWindow for performance and resource sensitive embedded systems. By coloring data structure in memory with single associate property bit to each byte and extending the target memory block to a BFWindow(2), it validates each memory write by speculatively checking consistency of data properties within the extended buffer window. Property bits are generated by compiler statically and checked by hardware at runtime. They are transparent to users. Experimental results show that the proposed mechanism is effective to prevent sequential memory writes from crossing buffer boundaries which is the common scenario of buffer overflow exploitations. The performance overhead for practical protection mode across embedded system benchmarks is under 1%.