The bulk execution of a sequential algorithm is to execute it for many different inputs in turn or at the same time. It is known that the bulk execution of an oblivious sequential algorithm can be implemented to run efficiently on a GPU. The bulk execution supports fine grained bitwise parallelism, allowing it to achieve high acceleration over a straightforward sequential computation. The main contribution of this work is to present a Bitwise Parallel Bulk Computation (BPBC) to accelerate the Smith-Waterman Algorithm (SWA) using the affine gap penalty. Thus, our idea is to convert this computation into a circuit simulation using the BPBC technique to compute multiple instances simultaneously. The proposed BPBC technique for the SWA has been implemented on the GPU and CPU. Experimental results show that the proposed BPBC for the SWA accelerates the computation by over 646 times as compared to a single CPU implementation and by 6.9 times as compared to a multi-core CPU implementation with 160 threads.

In this paper, we present a new design to support multicasting in an ATM switches, called the Singlecast Stuffed Multicast Advanced Processing (SSMAP) ATM switch, which can transmit multicast traffic effectively. The SSMAP ATM switch consists of two cell operation parts, a multicast operation part and a singlecast operation part. This structure is designed so as to increase the efficiency of packet forwarding by allowing singlecast cells to use the resources that remain unused during multicast traffic handling. Furthermore, we propose new multicast scheduling methods using the SSMAP ATM switch. We evaluate the characteristics of the SSMAP ATM switch and multicast scheduling methods by computer simulations, and demonstrate their validity.