This paper presents the history of superconductor digital circuits starting from several years after the discovery of the Josephson junction in 1962. The first two decades were mainly devoted to developing voltage-state logic, which is similar to semiconductor logic. Research on circuits employing the manipulation of single magnetic flux quanta resulted in a form called RSFQ in the mid-1980s; this is the basis of superconductor logic systems of today. The more difficult problem of random access memory is reviewed. We analyze the present status of the field and outline the work that lies ahead to realize a successful superconductor digital technology.

We present the design of dual rail Data Driven Self Timed (DDST) DEMUX and MUX circuits for 50 GHz operation. The chosen current density is 6.5 kA/cm2 and simulations show good margins for speeds exceeding 50 GHz. Our previously reported dual-rail on-chip test system is also scaled up for 50 GHz operation.