In this paper, to improve communication system's energy-efficiency (EE), multi-case optimization of two new transmission strategies is investigated. Firstly, with amplify-and-forward relaying and full-duplex technique, two new transmission strategies are designed. The designed transmission strategies consider direct links and non-ideal transmission conditions. At the same time, detailed capacity and energy consumption analyses of the designed transmission strategies are given. In addition, EE optimization and analysis of the designed transmission strategies are studied. It is the first case of EE optimization and it is achieved by joint optimization of transmit time (TT) and transmit power (TP). Furthermore, the second and third cases of EE optimization with respectively optimizing TT and TP are given. Simulations reveal that the designed transmission strategies can effectively improve the communication system's EE.

RSPICE, a fast timing simulator for large digital MOS circuits, is presented in this paper. A new table-based region-wise linear MOS transistor model and the analytical solution of the generic sub-circuit primitive are applied to calculate the transient response of digital MOS circuits. The body effect of pass transistors is included in the MOS model and the floating capacitor network can be handled by this sub-circuit primitive as well. In RSPICE, MOS transistors with a DC path are grouped into a DC-connected block (DCCB), and DCCBs with a feedback path are combined as a strongly connected component (SCC). RSPICE orders SCCs by Tarjan's algorithm and simulates ordered SCCs one by one. DCCBs are basic cells in RSPICE and any DCCB can be mapped into one or more sub-circuit primitives. In order to calculate the transient response of these primitives analytically, RSPICE approximates the input signals of the primitive by piecewise linear functions. To compromise the simulation accuracy and run time, partial waveform and partial time convergent (PWPTC) combined with dynamic windowing technique is applied to simulate SCCs. Other key issues of RSPICE, such as circuit partition, pass-transistor and floating-capacitor processing, simulation-flow control and waveform modification are also discussed in detail. Compared with HSPICE , the simulation result of RSPICE is very accurate with an error less than 3%, but the speed is 1-2 orders over HSPICE.