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[Keyword] DmB1M code(2hit)

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  • Multiple DmB1C/DmB1M Coding Scheme for High-Speed Optical Multiplex Transmission

    Koichi MURATA  Yoshihiko UENATSU  Yoshiaki YAMABAYASHI  Yukio KOBAYASHI  

     
    PAPER-Optical Communication

      Vol:
    E80-B No:8
      Page(s):
    1248-1254

    This paper describes a new multiple DmB1C (Differential m Binary 1 Complement insertion) /DmB1M (Differential m Binary with 1 Mark insertion) coding scheme for high-speed optical multiplex transmission. The coding scheme has the characteristics of small consecutive identical digits and a good balance between marks and spaces. Furthermore, it has also good synchronization characteristics and higher flexibility for extension to high capacity transmission than the conventional mB1C or DmB1M coding schemes. We describe a design methodology for a multiplex transmission system using the proposed coding scheme, and verify the characteristics of the proposed coding scheme using an experimental setup of a 2.8 Gbit/s serial optical interconnection circuit, which has 16 parallel 156 Mbit/s inputs. The coding scheme realizes transmission systems with simple analog circuit configuration, and small digital circuit complexity with wide dynamic range and good mark ratio tolerance.

  • Parallel mB1C Word Alignment Procedure and Its Performance for High-Speed Optical Transmission

    Yoshihiko UEMATSU  Koichi MURATA  Shinji MATSUOKA  

     
    PAPER-Communication Systems and Transmission Equipment

      Vol:
    E80-B No:3
      Page(s):
    476-482

    This paper proposes a parallel word alignment procedure for m Binary with 1 Complement Insertion (mBlC) or Differential m Binary with l Mark Insertion (DmBlM) line code. In the proposed procedure for mBlC line code, the word alignment circuit searches (m+1) bit pairs in parallel for complementary relationships. A Signal Flow Graph Model for the parallel word alignment procedure is also proposed, and its performance attributes are numerically analyzed. The attributes are compared with those of the conventional bit-by-bit procedure, and it is shown that the proposed procedure displays superior performance in terms of False-Alignment Probability and Maximum Average Aligning Time. The proposed procedure is suitable for high speed optical data links, because it can be easily implemented using a parallel signal processor operating at a clock rate equal to 1/(m+1) times the mBlC line rate.

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