In this paper, the separation of heat generation and heat transfer related to temperature rise of silver palladium contact was investigated experimentally in order to predict the temperature rise of contact by the use conditions such as voltage range between 25 to 40 V, current range between 3.2 to 5.0 A and silver palladium alloy (AgPd) materials. Firstly, relationship between temperature rise of contact and supply power was discussed. The effects of heat generation and heat transfer on temperature rise were separated and quantified by least squares method. Secondly, effects of durations and integral powers of bridge and arc on temperature rise were also discussed by changing supply power. Results show that the integral power of the bridge increases when supply power increases. As the supply power increases, integral power of arc also increases. The temperature rise is dominated by integral power of bridge. Remarkable difference of bridge duration can not be seen in the five materials (AgPd30, AgPd40, AgPd50, AgPd70 and Pd). The supply power is increased, arc duration gets longer. As weight percent of Pd content increases, the effect of supply power on arc duration becomes larger. Consequently, the integral power of arc increases. This study is a basic consideration to realize methods predicting temperature rise of contact.

We present a physics-based circuit simulator employing the Monte Carlo (MC) particle technique, which serves as a bridge between the small-device physics and the circuit designs. Two different geometries of GaAs-MESFET's are modeled and analyzed by the simulator. The Y-parameters of the devices are extracted from the transient currents, and then translated into the S-parameters. The cut-off frequency (fT) is estimated from the Y-parameters. The minimum noise figure (Fmin) is also estimated by evaluating the fluctuation in the stationary current. The device, having the n+-region placed just at the drain side of the gate, exhibits the better performances in both fT and Fmin. The analysis on the equivalent circuit (EC) elements reveals that its better performances are mainly due to the reduced gate-source capacitance (Cgs) and the increased transconductance (gm0), which result from the shortened effective gate length (Lg) caused by the termination of the depletion region at the gate edge. The termination of the depletion region, however, causes the increase of the electric field, which results in the higher heat generation rate near the gate edge. It is proven that the physics-based circuit simulator developed here is fully effective to see the inside of the small-device and to model it for the millimeter-wave circuit design.

A simulation study on cylindrical semiconductor devices is described, where the internal behavior of power devices are analyzed under steady-state condition with considering heat generation. In simulation, circular cylindrical coordinate is used to consider the effect of three-dimensional spreading current flow with keeping calculation time and memory as in two-dimensional simulation. Numerical model is based on the well-known set of Shockley-Roosbroeck semiconductor equations--continuity equations for carriers and Poisson's equation, along with heat flow equation. Drift-diffusion approximation of carrier transport equations is used, taking temperature field as a driving force for carriers into account. Using the cylindrical simulator, numerical analysis of power MOSFETs, which integrate zener diodes to improve the avalanche capability, has been carried out. Results showed that, a parasitic bipolar transistor turns on under forward-biased condition in a power MOSFET with a zener diode. The highest lattice temperature takes place at source edge. Under reverse-biased condition, breakdown occurs at doughnut area around the bottom of source contact (at the upper region of zener junction), and the avalanche current flows detouring the base region of parasitic bipolar transistor which implies that secondary breakdown will be suppressed. The highest lattice temperature region under reverse-biased conditions is the same as the breakdown region. Without zener diodes, on the other hand, breakdown occurs ringing about the edge of source region, and the avalanche current flows through the base region of parasitic bipolar transistor which implies that even MOSFETs may suffer from the secondary breakdown. As channel length becomes short, breakdown caused by punchthrough becomes dominant at the edge of source region.