This paper presents a voltage-mode WTA/MAX circuit that achieves high-speed and multi-chip features. Based on the efficient averaged-value comparison approach, the time and hardware complexities are proportional to O(log N) and O(N) respectively, where N is the number of inputs. In addition, a voltage comparison element (VCE) circuit is proposed to achieve multi-chip function. In the proposed circuit, the averaged-value calculator is built using resistor array that prevents the matching problem of transistor array. The whole circuit was fabricated with the TSMC 0.35 µm signal-poly quadruple-metal CMOS process. With eight input signals, the measurement results show that the proposed circuit resolved input voltages differing by 10 mV in 30 ns, and the multi-chip capability was also verified.

A new approach for electronic sealed-bid auctions that preserve the privacy of losing bids is presented. It reduces the number of operations performed by the auctioneers to O(log ); previous protocols require O(N ) or O(N log ) where the number of bidders is N and that of available bidding prices is . Namely, the number of auctioneers' operations in our auction protocol is independent of the number of bidders. This feature offers strong advantages in massive auctions. We also propose a new scheme that checks the equality of two values without disclosing them. The scheme enhances our basic auction protocol, in terms of security and communication costs.