A new efficient waveform relaxation technique based on dynamically overlapped partitioning scheme is presented. This overlapped partitioning method enables the application of waveform relaxation technique to bipolar VLSI circuits. Instead of fixed overlapping, we select the depth of overlapping dynamically based on the sensitivity criteria. By minimizing the overlapped area, we could reduce the additional computational overhead which results from overlapping the partitions. This overlapped waveform relaxation method has better convergence properties due to smaller error introduced at each step compared with standard relaxation techniques. When overlapped partitioning is used in the case of digital circuits, the waveforms obtained after first iteration are nearly accurate. Therefore, by using these waveforms as initial guess waveforms for the second iterations we can reduce Newton-Raphson iterations at each time point.

Acceleration techniques have been incorporated into the generalized method of characteristics (GMC) to perform transient analysis of uniform transmission lines, for the special case when the transmission lines are driven by digital signals. These techinques have been proved to improve the simulation speed to a great extent when the analysis is carried out using iterative waveform relaxation method. It has been identified that the load impedance connected to the transmission line has a bearing on the efficiency of one of these acceleration techniques. Examples of an RLCG line terminated with linear loads as well as nonlinear loads are given to illustrate the advantage of incorporating these acceleration techniques.