Dimensioning Burst Assembly Process in Optical Burst Switching Networks

JungYul CHOI; JinSeek CHOI; Minho KANG

doi:10.1093/ietcom/e88-b.10.3855

Dimensioning Burst Assembly Process in Optical Burst Switching Networks

JungYul CHOI, JinSeek CHOI, Minho KANG

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Suitably aggregated data burst enhances link utilization and reduces data processing complexity of optical transport networks rather than just transmitting each bursty input traffic from access networks. This data burst generation method is called as a burst assembly process and has two assembly parameters, timer and threshold, for regulating burst release time and burst size. Since the traffic characteristics of data burst generated at the burst assembler may affect network performance, the decision of burst assembly parameters should be carefully designed. Thus, in this paper we study the dimensioning burst assembly process to find the burst assembly parameter values satisfying target performance. For this purpose, we first analyze timer-based and threshold-based burst assembly processes, respectively. As constraints on the dimensioning burst assembly process, we consider the following performance metrics: 1) processing delay of control packet, 2) burst loss at control plane, and 3) link utilization. Based on these constraints, a decision mechanism of the burst assembly parameters is proposed. From numerical analysis, we suggest a possible lower boundary value for the burst assembly parameters satisfying the target burst loss rate and delay time at the control plane.

Publication: IEICE TRANSACTIONS on Communications Vol.E88-B No.10 pp.3855-3863

Publication Date: 2005/10/01

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DOI: 10.1093/ietcom/e88-b.10.3855

Type of Manuscript: Special Section PAPER (Special Section on Next Generation Photonic Network Technologies)

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JungYul CHOI, JinSeek CHOI, Minho KANG, "Dimensioning Burst Assembly Process in Optical Burst Switching Networks" in IEICE TRANSACTIONS on Communications, vol. E88-B, no. 10, pp. 3855-3863, October 2005, doi: 10.1093/ietcom/e88-b.10.3855.
Abstract: Suitably aggregated data burst enhances link utilization and reduces data processing complexity of optical transport networks rather than just transmitting each bursty input traffic from access networks. This data burst generation method is called as a burst assembly process and has two assembly parameters, timer and threshold, for regulating burst release time and burst size. Since the traffic characteristics of data burst generated at the burst assembler may affect network performance, the decision of burst assembly parameters should be carefully designed. Thus, in this paper we study the dimensioning burst assembly process to find the burst assembly parameter values satisfying target performance. For this purpose, we first analyze timer-based and threshold-based burst assembly processes, respectively. As constraints on the dimensioning burst assembly process, we consider the following performance metrics: 1) processing delay of control packet, 2) burst loss at control plane, and 3) link utilization. Based on these constraints, a decision mechanism of the burst assembly parameters is proposed. From numerical analysis, we suggest a possible lower boundary value for the burst assembly parameters satisfying the target burst loss rate and delay time at the control plane.
URL: https://globals.ieice.org/en_transactions/communications/10.1093/ietcom/e88-b.10.3855/_p

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@ARTICLE{e88-b_10_3855,
author={JungYul CHOI, JinSeek CHOI, Minho KANG, },
journal={IEICE TRANSACTIONS on Communications},
title={Dimensioning Burst Assembly Process in Optical Burst Switching Networks},
year={2005},
volume={E88-B},
number={10},
pages={3855-3863},
abstract={Suitably aggregated data burst enhances link utilization and reduces data processing complexity of optical transport networks rather than just transmitting each bursty input traffic from access networks. This data burst generation method is called as a burst assembly process and has two assembly parameters, timer and threshold, for regulating burst release time and burst size. Since the traffic characteristics of data burst generated at the burst assembler may affect network performance, the decision of burst assembly parameters should be carefully designed. Thus, in this paper we study the dimensioning burst assembly process to find the burst assembly parameter values satisfying target performance. For this purpose, we first analyze timer-based and threshold-based burst assembly processes, respectively. As constraints on the dimensioning burst assembly process, we consider the following performance metrics: 1) processing delay of control packet, 2) burst loss at control plane, and 3) link utilization. Based on these constraints, a decision mechanism of the burst assembly parameters is proposed. From numerical analysis, we suggest a possible lower boundary value for the burst assembly parameters satisfying the target burst loss rate and delay time at the control plane.},
keywords={},
doi={10.1093/ietcom/e88-b.10.3855},
ISSN={},
month={October},}

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TY - JOUR
TI - Dimensioning Burst Assembly Process in Optical Burst Switching Networks
T2 - IEICE TRANSACTIONS on Communications
SP - 3855
EP - 3863
AU - JungYul CHOI
AU - JinSeek CHOI
AU - Minho KANG
PY - 2005
DO - 10.1093/ietcom/e88-b.10.3855
JO - IEICE TRANSACTIONS on Communications
SN -
VL - E88-B
IS - 10
JA - IEICE TRANSACTIONS on Communications
Y1 - October 2005
AB - Suitably aggregated data burst enhances link utilization and reduces data processing complexity of optical transport networks rather than just transmitting each bursty input traffic from access networks. This data burst generation method is called as a burst assembly process and has two assembly parameters, timer and threshold, for regulating burst release time and burst size. Since the traffic characteristics of data burst generated at the burst assembler may affect network performance, the decision of burst assembly parameters should be carefully designed. Thus, in this paper we study the dimensioning burst assembly process to find the burst assembly parameter values satisfying target performance. For this purpose, we first analyze timer-based and threshold-based burst assembly processes, respectively. As constraints on the dimensioning burst assembly process, we consider the following performance metrics: 1) processing delay of control packet, 2) burst loss at control plane, and 3) link utilization. Based on these constraints, a decision mechanism of the burst assembly parameters is proposed. From numerical analysis, we suggest a possible lower boundary value for the burst assembly parameters satisfying the target burst loss rate and delay time at the control plane.
ER -