Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications

In-Gul JANG; Kyung-Ju CHO; Yong-Eun KIM; Jin-Gyun CHUNG

doi:10.1587/transcom.E95.B.2059

Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications

In-Gul JANG, Kyung-Ju CHO, Yong-Eun KIM, Jin-Gyun CHUNG

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In this paper, to reduce the memory size requirements of IFFT for OFDM-based applications, we propose a new IFFT design technique based on a combined integer mapping of three IFFT input signals: modulated data, pilot and null signals. The proposed method focuses on reducing the size of memory cells in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the total memory cells. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 13% reduction in gate count and 11% reduction in power consumption compared with conventional IFFT design.

Publication: IEICE TRANSACTIONS on Communications Vol.E95-B No.6 pp.2059-2064

Publication Date: 2012/06/01

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Online ISSN: 1745-1345

DOI: 10.1587/transcom.E95.B.2059

Type of Manuscript: PAPER

Category: Wireless Communication Technologies

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In-Gul JANG, Kyung-Ju CHO, Yong-Eun KIM, Jin-Gyun CHUNG, "Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications" in IEICE TRANSACTIONS on Communications, vol. E95-B, no. 6, pp. 2059-2064, June 2012, doi: 10.1587/transcom.E95.B.2059.
Abstract: In this paper, to reduce the memory size requirements of IFFT for OFDM-based applications, we propose a new IFFT design technique based on a combined integer mapping of three IFFT input signals: modulated data, pilot and null signals. The proposed method focuses on reducing the size of memory cells in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the total memory cells. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 13% reduction in gate count and 11% reduction in power consumption compared with conventional IFFT design.
URL: https://globals.ieice.org/en_transactions/communications/10.1587/transcom.E95.B.2059/_p

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@ARTICLE{e95-b_6_2059,
author={In-Gul JANG, Kyung-Ju CHO, Yong-Eun KIM, Jin-Gyun CHUNG, },
journal={IEICE TRANSACTIONS on Communications},
title={Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications},
year={2012},
volume={E95-B},
number={6},
pages={2059-2064},
abstract={In this paper, to reduce the memory size requirements of IFFT for OFDM-based applications, we propose a new IFFT design technique based on a combined integer mapping of three IFFT input signals: modulated data, pilot and null signals. The proposed method focuses on reducing the size of memory cells in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the total memory cells. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 13% reduction in gate count and 11% reduction in power consumption compared with conventional IFFT design.},
keywords={},
doi={10.1587/transcom.E95.B.2059},
ISSN={1745-1345},
month={June},}

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TY - JOUR
TI - Memory Size Reduction Technique of SDF IFFT Architecture for OFDM-Based Applications
T2 - IEICE TRANSACTIONS on Communications
SP - 2059
EP - 2064
AU - In-Gul JANG
AU - Kyung-Ju CHO
AU - Yong-Eun KIM
AU - Jin-Gyun CHUNG
PY - 2012
DO - 10.1587/transcom.E95.B.2059
JO - IEICE TRANSACTIONS on Communications
SN - 1745-1345
VL - E95-B
IS - 6
JA - IEICE TRANSACTIONS on Communications
Y1 - June 2012
AB - In this paper, to reduce the memory size requirements of IFFT for OFDM-based applications, we propose a new IFFT design technique based on a combined integer mapping of three IFFT input signals: modulated data, pilot and null signals. The proposed method focuses on reducing the size of memory cells in the first two stages of the single-path delay feedback (SDF) IFFT architectures since the first two stages require 75% of the total memory cells. By simulations of 2048-point IFFT design for cognitive radio systems, it is shown that the proposed IFFT design method achieves more than 13% reduction in gate count and 11% reduction in power consumption compared with conventional IFFT design.
ER -