Frequency-Controllable Image Rejection Down CMOS Mixer

Tuan-Anh PHAN; Chang-Wan KIM; Yun-A SHIM; Sang-Gug LEE

doi:10.1093/ietele/e88-c.12.2322

Frequency-Controllable Image Rejection Down CMOS Mixer

Tuan-Anh PHAN, Chang-Wan KIM, Yun-A SHIM, Sang-Gug LEE

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This paper presents a frequency-controllable image rejection mixer in heterodyne architecture for 2 GHz applications based on TSMC 0.18 µm CMOS technology. The designed mixer uses a notch filter to suppress the image signal and allows precise tuning the image frequencies. An image rejection of 20-70 dB is obtained in a 200 MHz of bandwidth. The simulation results show single-side band (SSB) NF is improved 3.7 dB, the voltage conversion gain of 14.7 dB, improved by more than 4 dB. The circuit operates at the supply voltage of 1.8 V, and dissipates 11.34 mW.

Publication: IEICE TRANSACTIONS on Electronics Vol.E88-C No.12 pp.2322-2324

Publication Date: 2005/12/01

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Online ISSN

DOI: 10.1093/ietele/e88-c.12.2322

Type of Manuscript: Special Section LETTER (Special Section on Wireless Technologies and Computational Electromagnetics)

Category: Devices

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Tuan-Anh PHAN, Chang-Wan KIM, Yun-A SHIM, Sang-Gug LEE, "Frequency-Controllable Image Rejection Down CMOS Mixer" in IEICE TRANSACTIONS on Electronics, vol. E88-C, no. 12, pp. 2322-2324, December 2005, doi: 10.1093/ietele/e88-c.12.2322.
Abstract: This paper presents a frequency-controllable image rejection mixer in heterodyne architecture for 2 GHz applications based on TSMC 0.18 µm CMOS technology. The designed mixer uses a notch filter to suppress the image signal and allows precise tuning the image frequencies. An image rejection of 20-70 dB is obtained in a 200 MHz of bandwidth. The simulation results show single-side band (SSB) NF is improved 3.7 dB, the voltage conversion gain of 14.7 dB, improved by more than 4 dB. The circuit operates at the supply voltage of 1.8 V, and dissipates 11.34 mW.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e88-c.12.2322/_p

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@ARTICLE{e88-c_12_2322,
author={Tuan-Anh PHAN, Chang-Wan KIM, Yun-A SHIM, Sang-Gug LEE, },
journal={IEICE TRANSACTIONS on Electronics},
title={Frequency-Controllable Image Rejection Down CMOS Mixer},
year={2005},
volume={E88-C},
number={12},
pages={2322-2324},
abstract={This paper presents a frequency-controllable image rejection mixer in heterodyne architecture for 2 GHz applications based on TSMC 0.18 µm CMOS technology. The designed mixer uses a notch filter to suppress the image signal and allows precise tuning the image frequencies. An image rejection of 20-70 dB is obtained in a 200 MHz of bandwidth. The simulation results show single-side band (SSB) NF is improved 3.7 dB, the voltage conversion gain of 14.7 dB, improved by more than 4 dB. The circuit operates at the supply voltage of 1.8 V, and dissipates 11.34 mW.},
keywords={},
doi={10.1093/ietele/e88-c.12.2322},
ISSN={},
month={December},}

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TY - JOUR
TI - Frequency-Controllable Image Rejection Down CMOS Mixer
T2 - IEICE TRANSACTIONS on Electronics
SP - 2322
EP - 2324
AU - Tuan-Anh PHAN
AU - Chang-Wan KIM
AU - Yun-A SHIM
AU - Sang-Gug LEE
PY - 2005
DO - 10.1093/ietele/e88-c.12.2322
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E88-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 2005
AB - This paper presents a frequency-controllable image rejection mixer in heterodyne architecture for 2 GHz applications based on TSMC 0.18 µm CMOS technology. The designed mixer uses a notch filter to suppress the image signal and allows precise tuning the image frequencies. An image rejection of 20-70 dB is obtained in a 200 MHz of bandwidth. The simulation results show single-side band (SSB) NF is improved 3.7 dB, the voltage conversion gain of 14.7 dB, improved by more than 4 dB. The circuit operates at the supply voltage of 1.8 V, and dissipates 11.34 mW.
ER -