A high-speed drive technique is introduced in which addressing is done by eliminating, instead of accumulating, the wall charges. In the proposed scheme, wall charges are accumulated in all the cells in advance, and then the address discharges take place in selected cells to eliminate the wall charges. Sustain discharges are generated in these cells. In order to realize the proposed address scheme, re-designing of a setup waveforms was necessary. The data pulse of 1.33 µs wide and 84 V was realized in a Ne+10%Xe PDP. A contrast of 3,600:1 was obtained by providing one setup period in a TV field.
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Takateru SAWADA, Tomokazu SHIGA, Shigeo MIKOSHIBA, "High-Speed Drive Waveforms of PDPs with Wall-Charge Elimination, Write-Address Scheme" in IEICE TRANSACTIONS on Electronics,
vol. E89-C, no. 10, pp. 1395-1399, October 2006, doi: 10.1093/ietele/e89-c.10.1395.
Abstract: A high-speed drive technique is introduced in which addressing is done by eliminating, instead of accumulating, the wall charges. In the proposed scheme, wall charges are accumulated in all the cells in advance, and then the address discharges take place in selected cells to eliminate the wall charges. Sustain discharges are generated in these cells. In order to realize the proposed address scheme, re-designing of a setup waveforms was necessary. The data pulse of 1.33 µs wide and 84 V was realized in a Ne+10%Xe PDP. A contrast of 3,600:1 was obtained by providing one setup period in a TV field.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.10.1395/_p
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@ARTICLE{e89-c_10_1395,
author={Takateru SAWADA, Tomokazu SHIGA, Shigeo MIKOSHIBA, },
journal={IEICE TRANSACTIONS on Electronics},
title={High-Speed Drive Waveforms of PDPs with Wall-Charge Elimination, Write-Address Scheme},
year={2006},
volume={E89-C},
number={10},
pages={1395-1399},
abstract={A high-speed drive technique is introduced in which addressing is done by eliminating, instead of accumulating, the wall charges. In the proposed scheme, wall charges are accumulated in all the cells in advance, and then the address discharges take place in selected cells to eliminate the wall charges. Sustain discharges are generated in these cells. In order to realize the proposed address scheme, re-designing of a setup waveforms was necessary. The data pulse of 1.33 µs wide and 84 V was realized in a Ne+10%Xe PDP. A contrast of 3,600:1 was obtained by providing one setup period in a TV field.},
keywords={},
doi={10.1093/ietele/e89-c.10.1395},
ISSN={1745-1353},
month={October},}
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TY - JOUR
TI - High-Speed Drive Waveforms of PDPs with Wall-Charge Elimination, Write-Address Scheme
T2 - IEICE TRANSACTIONS on Electronics
SP - 1395
EP - 1399
AU - Takateru SAWADA
AU - Tomokazu SHIGA
AU - Shigeo MIKOSHIBA
PY - 2006
DO - 10.1093/ietele/e89-c.10.1395
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 10
JA - IEICE TRANSACTIONS on Electronics
Y1 - October 2006
AB - A high-speed drive technique is introduced in which addressing is done by eliminating, instead of accumulating, the wall charges. In the proposed scheme, wall charges are accumulated in all the cells in advance, and then the address discharges take place in selected cells to eliminate the wall charges. Sustain discharges are generated in these cells. In order to realize the proposed address scheme, re-designing of a setup waveforms was necessary. The data pulse of 1.33 µs wide and 84 V was realized in a Ne+10%Xe PDP. A contrast of 3,600:1 was obtained by providing one setup period in a TV field.
ER -