System LSI: Challenges and Opportunities

Tadahiro KURODA

doi:10.1093/ietele/e89-c.3.213

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Tadahiro KURODA, "System LSI: Challenges and Opportunities" in IEICE TRANSACTIONS on Electronics, vol. E89-C, no. 3, pp. 213-220, March 2006, doi: 10.1093/ietele/e89-c.3.213.
Abstract: Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop? This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e89-c.3.213/_p

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@ARTICLE{e89-c_3_213,
author={Tadahiro KURODA, },
journal={IEICE TRANSACTIONS on Electronics},
title={System LSI: Challenges and Opportunities},
year={2006},
volume={E89-C},
number={3},
pages={213-220},
abstract={Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop? This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).},
keywords={},
doi={10.1093/ietele/e89-c.3.213},
ISSN={1745-1353},
month={March},}

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TY - JOUR
TI - System LSI: Challenges and Opportunities
T2 - IEICE TRANSACTIONS on Electronics
SP - 213
EP - 220
AU - Tadahiro KURODA
PY - 2006
DO - 10.1093/ietele/e89-c.3.213
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E89-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2006
AB - Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop? This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).
ER -