A test structure to separately analyze the location where the hot-carrier-induced CMOSFET reliability is determined around the center or the isolation-edge along the channel-width was proposed and fabricated. The test structure has four kinds of MOSFETs; [A] and [D] MOSFETs with a short and a long channel-length all over the channel width, respectively, [B] MOSFET with the short and the long channel-length around the center and the both isolation-edges, respectively, and [C] MOSFET with the channel-length regions vice versa to the [B] MOSFET. The time dependent changes of the threshold voltages VT, the saturation currents IS, the linear currents IL and the maximum transconductances β up to 50,000 s were measured. All data for the wide channel-width MOSFETs were almost categorized into three; [A], [B]/[C] and [D]. The [B]/[C] data were well estimated from simple theoretical discussions by the combination of [A] and [D] data, which mean that the reliabilities are nearly the same around the center or the isolation-edge for the CMOSFETs.
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Takashi OHZONE, Eiji ISHII, Takayuki MORISHITA, Kiyotaka KOMOKU, Toshihiro MATSUDA, Hideyuki IWATA, "A Test Structure to Analyze Electrical CMOSFET Reliabilities between Center and Edge along the Channel Width" in IEICE TRANSACTIONS on Electronics,
vol. E90-C, no. 2, pp. 515-522, February 2007, doi: 10.1093/ietele/e90-c.2.515.
Abstract: A test structure to separately analyze the location where the hot-carrier-induced CMOSFET reliability is determined around the center or the isolation-edge along the channel-width was proposed and fabricated. The test structure has four kinds of MOSFETs; [A] and [D] MOSFETs with a short and a long channel-length all over the channel width, respectively, [B] MOSFET with the short and the long channel-length around the center and the both isolation-edges, respectively, and [C] MOSFET with the channel-length regions vice versa to the [B] MOSFET. The time dependent changes of the threshold voltages VT, the saturation currents IS, the linear currents IL and the maximum transconductances β up to 50,000 s were measured. All data for the wide channel-width MOSFETs were almost categorized into three; [A], [B]/[C] and [D]. The [B]/[C] data were well estimated from simple theoretical discussions by the combination of [A] and [D] data, which mean that the reliabilities are nearly the same around the center or the isolation-edge for the CMOSFETs.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.2.515/_p
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@ARTICLE{e90-c_2_515,
author={Takashi OHZONE, Eiji ISHII, Takayuki MORISHITA, Kiyotaka KOMOKU, Toshihiro MATSUDA, Hideyuki IWATA, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Test Structure to Analyze Electrical CMOSFET Reliabilities between Center and Edge along the Channel Width},
year={2007},
volume={E90-C},
number={2},
pages={515-522},
abstract={A test structure to separately analyze the location where the hot-carrier-induced CMOSFET reliability is determined around the center or the isolation-edge along the channel-width was proposed and fabricated. The test structure has four kinds of MOSFETs; [A] and [D] MOSFETs with a short and a long channel-length all over the channel width, respectively, [B] MOSFET with the short and the long channel-length around the center and the both isolation-edges, respectively, and [C] MOSFET with the channel-length regions vice versa to the [B] MOSFET. The time dependent changes of the threshold voltages VT, the saturation currents IS, the linear currents IL and the maximum transconductances β up to 50,000 s were measured. All data for the wide channel-width MOSFETs were almost categorized into three; [A], [B]/[C] and [D]. The [B]/[C] data were well estimated from simple theoretical discussions by the combination of [A] and [D] data, which mean that the reliabilities are nearly the same around the center or the isolation-edge for the CMOSFETs.},
keywords={},
doi={10.1093/ietele/e90-c.2.515},
ISSN={1745-1353},
month={February},}
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TY - JOUR
TI - A Test Structure to Analyze Electrical CMOSFET Reliabilities between Center and Edge along the Channel Width
T2 - IEICE TRANSACTIONS on Electronics
SP - 515
EP - 522
AU - Takashi OHZONE
AU - Eiji ISHII
AU - Takayuki MORISHITA
AU - Kiyotaka KOMOKU
AU - Toshihiro MATSUDA
AU - Hideyuki IWATA
PY - 2007
DO - 10.1093/ietele/e90-c.2.515
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 2
JA - IEICE TRANSACTIONS on Electronics
Y1 - February 2007
AB - A test structure to separately analyze the location where the hot-carrier-induced CMOSFET reliability is determined around the center or the isolation-edge along the channel-width was proposed and fabricated. The test structure has four kinds of MOSFETs; [A] and [D] MOSFETs with a short and a long channel-length all over the channel width, respectively, [B] MOSFET with the short and the long channel-length around the center and the both isolation-edges, respectively, and [C] MOSFET with the channel-length regions vice versa to the [B] MOSFET. The time dependent changes of the threshold voltages VT, the saturation currents IS, the linear currents IL and the maximum transconductances β up to 50,000 s were measured. All data for the wide channel-width MOSFETs were almost categorized into three; [A], [B]/[C] and [D]. The [B]/[C] data were well estimated from simple theoretical discussions by the combination of [A] and [D] data, which mean that the reliabilities are nearly the same around the center or the isolation-edge for the CMOSFETs.
ER -