Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS

Kazutami ARIMOTO; Toshihiro HATTORI; Hidehiro TAKATA; Atsushi HASEGAWA; Toru SHIMIZU

doi:10.1093/ietele/e90-c.4.657

Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS

Kazutami ARIMOTO, Toshihiro HATTORI, Hidehiro TAKATA, Atsushi HASEGAWA, Toru SHIMIZU

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Many embedded system application in ubiquitous network strongly require the high performance SoC with overcoming the physical limitations in the advanced CMOS. To develop these SoC, the continuous design efforts have been done. The initial efforts are the primitive level circuit technique and power switching control method for suppressing the standby currents. However, the additional physical limitations and system enhancements becomes main factors, the new design efforts have been proposed. These design efforts are the application-oriented technologies from the system level to device level. This paper introduces the self voltage controlled technique to cancel the PVT (process, voltage, and temperature) variation, power distribution and power management for cellular phone application, parallel algorithm and optimized layout DSP, and massively parallel fine-grained SIMD processor for next multimedia application. The high performance SoC for the embedded are achieved by providing the components of the system level IPs and making the application oriented SoC platform.

Publication: IEICE TRANSACTIONS on Electronics Vol.E90-C No.4 pp.657-665

Publication Date: 2007/04/01

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Online ISSN: 1745-1353

DOI: 10.1093/ietele/e90-c.4.657

Type of Manuscript: Special Section INVITED PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)

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Kazutami ARIMOTO, Toshihiro HATTORI, Hidehiro TAKATA, Atsushi HASEGAWA, Toru SHIMIZU, "Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS" in IEICE TRANSACTIONS on Electronics, vol. E90-C, no. 4, pp. 657-665, April 2007, doi: 10.1093/ietele/e90-c.4.657.
Abstract: Many embedded system application in ubiquitous network strongly require the high performance SoC with overcoming the physical limitations in the advanced CMOS. To develop these SoC, the continuous design efforts have been done. The initial efforts are the primitive level circuit technique and power switching control method for suppressing the standby currents. However, the additional physical limitations and system enhancements becomes main factors, the new design efforts have been proposed. These design efforts are the application-oriented technologies from the system level to device level. This paper introduces the self voltage controlled technique to cancel the PVT (process, voltage, and temperature) variation, power distribution and power management for cellular phone application, parallel algorithm and optimized layout DSP, and massively parallel fine-grained SIMD processor for next multimedia application. The high performance SoC for the embedded are achieved by providing the components of the system level IPs and making the application oriented SoC platform.
URL: https://globals.ieice.org/en_transactions/electronics/10.1093/ietele/e90-c.4.657/_p

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@ARTICLE{e90-c_4_657,
author={Kazutami ARIMOTO, Toshihiro HATTORI, Hidehiro TAKATA, Atsushi HASEGAWA, Toru SHIMIZU, },
journal={IEICE TRANSACTIONS on Electronics},
title={Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS},
year={2007},
volume={E90-C},
number={4},
pages={657-665},
abstract={Many embedded system application in ubiquitous network strongly require the high performance SoC with overcoming the physical limitations in the advanced CMOS. To develop these SoC, the continuous design efforts have been done. The initial efforts are the primitive level circuit technique and power switching control method for suppressing the standby currents. However, the additional physical limitations and system enhancements becomes main factors, the new design efforts have been proposed. These design efforts are the application-oriented technologies from the system level to device level. This paper introduces the self voltage controlled technique to cancel the PVT (process, voltage, and temperature) variation, power distribution and power management for cellular phone application, parallel algorithm and optimized layout DSP, and massively parallel fine-grained SIMD processor for next multimedia application. The high performance SoC for the embedded are achieved by providing the components of the system level IPs and making the application oriented SoC platform.},
keywords={},
doi={10.1093/ietele/e90-c.4.657},
ISSN={1745-1353},
month={April},}

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TY - JOUR
TI - Continuous Design Efforts for Ubiquitous Network Era under the Physical Limitation of Advanced CMOS
T2 - IEICE TRANSACTIONS on Electronics
SP - 657
EP - 665
AU - Kazutami ARIMOTO
AU - Toshihiro HATTORI
AU - Hidehiro TAKATA
AU - Atsushi HASEGAWA
AU - Toru SHIMIZU
PY - 2007
DO - 10.1093/ietele/e90-c.4.657
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E90-C
IS - 4
JA - IEICE TRANSACTIONS on Electronics
Y1 - April 2007
AB - Many embedded system application in ubiquitous network strongly require the high performance SoC with overcoming the physical limitations in the advanced CMOS. To develop these SoC, the continuous design efforts have been done. The initial efforts are the primitive level circuit technique and power switching control method for suppressing the standby currents. However, the additional physical limitations and system enhancements becomes main factors, the new design efforts have been proposed. These design efforts are the application-oriented technologies from the system level to device level. This paper introduces the self voltage controlled technique to cancel the PVT (process, voltage, and temperature) variation, power distribution and power management for cellular phone application, parallel algorithm and optimized layout DSP, and massively parallel fine-grained SIMD processor for next multimedia application. The high performance SoC for the embedded are achieved by providing the components of the system level IPs and making the application oriented SoC platform.
ER -