An Overview of Video Coding VLSIs

Ryota KASAI; Toshihiro MINAMI

An Overview of Video Coding VLSIs

Ryota KASAI, Toshihiro MINAMI

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There are two approaches to implementing the international standard video coding algorithms such as H.261 and MPEG: a programmable DSP approach and a building block approach. The advantages and disadvantages of each are discussed here in detail, and the video coding algorithms and required throughput are also summarized. For more complex standard such as MPEG-, VLSI architecuture became more sophisticated. The DSP approach incorporates special processing engines and the building block approach integrates general-purpose microprocessors. Both approaches are capable of MPEG- NTSC coding in a single chip. Reduction of power consumption is a key issue for video LSIs. Architectures and circuits that reduce the supply voltage while maintaining throughput are summarized. A 0.25-µm, 3-GOPS, 0.5-W, SIMD-VSP for portable MPEG- systems could be made by using architecture-driven voltage scaling as well as feature-size scaling and SOI devices.

Publication: IEICE TRANSACTIONS on Electronics Vol.E77-C No.12 pp.1920-1929

Publication Date: 1994/12/25

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Type of Manuscript: Special Section INVITED PAPER (Special Issue on Multimedia, Analog and Processing LSIs)

Category: Processors

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Ryota KASAI, Toshihiro MINAMI, "An Overview of Video Coding VLSIs" in IEICE TRANSACTIONS on Electronics, vol. E77-C, no. 12, pp. 1920-1929, December 1994, doi: .
Abstract: There are two approaches to implementing the international standard video coding algorithms such as H.261 and MPEG: a programmable DSP approach and a building block approach. The advantages and disadvantages of each are discussed here in detail, and the video coding algorithms and required throughput are also summarized. For more complex standard such as MPEG-, VLSI architecuture became more sophisticated. The DSP approach incorporates special processing engines and the building block approach integrates general-purpose microprocessors. Both approaches are capable of MPEG- NTSC coding in a single chip. Reduction of power consumption is a key issue for video LSIs. Architectures and circuits that reduce the supply voltage while maintaining throughput are summarized. A 0.25-µm, 3-GOPS, 0.5-W, SIMD-VSP for portable MPEG- systems could be made by using architecture-driven voltage scaling as well as feature-size scaling and SOI devices.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e77-c_12_1920/_p

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@ARTICLE{e77-c_12_1920,
author={Ryota KASAI, Toshihiro MINAMI, },
journal={IEICE TRANSACTIONS on Electronics},
title={An Overview of Video Coding VLSIs},
year={1994},
volume={E77-C},
number={12},
pages={1920-1929},
abstract={There are two approaches to implementing the international standard video coding algorithms such as H.261 and MPEG: a programmable DSP approach and a building block approach. The advantages and disadvantages of each are discussed here in detail, and the video coding algorithms and required throughput are also summarized. For more complex standard such as MPEG-, VLSI architecuture became more sophisticated. The DSP approach incorporates special processing engines and the building block approach integrates general-purpose microprocessors. Both approaches are capable of MPEG- NTSC coding in a single chip. Reduction of power consumption is a key issue for video LSIs. Architectures and circuits that reduce the supply voltage while maintaining throughput are summarized. A 0.25-µm, 3-GOPS, 0.5-W, SIMD-VSP for portable MPEG- systems could be made by using architecture-driven voltage scaling as well as feature-size scaling and SOI devices.},
keywords={},
doi={},
ISSN={},
month={December},}

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TY - JOUR
TI - An Overview of Video Coding VLSIs
T2 - IEICE TRANSACTIONS on Electronics
SP - 1920
EP - 1929
AU - Ryota KASAI
AU - Toshihiro MINAMI
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E77-C
IS - 12
JA - IEICE TRANSACTIONS on Electronics
Y1 - December 1994
AB - There are two approaches to implementing the international standard video coding algorithms such as H.261 and MPEG: a programmable DSP approach and a building block approach. The advantages and disadvantages of each are discussed here in detail, and the video coding algorithms and required throughput are also summarized. For more complex standard such as MPEG-, VLSI architecuture became more sophisticated. The DSP approach incorporates special processing engines and the building block approach integrates general-purpose microprocessors. Both approaches are capable of MPEG- NTSC coding in a single chip. Reduction of power consumption is a key issue for video LSIs. Architectures and circuits that reduce the supply voltage while maintaining throughput are summarized. A 0.25-µm, 3-GOPS, 0.5-W, SIMD-VSP for portable MPEG- systems could be made by using architecture-driven voltage scaling as well as feature-size scaling and SOI devices.
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