Temperature Adaptive Voltage Reference Network for Realizing a Transconductance with Low Temperature Sensitivity

Rabin RAUT

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Rabin RAUT, "Temperature Adaptive Voltage Reference Network for Realizing a Transconductance with Low Temperature Sensitivity" in IEICE TRANSACTIONS on Electronics, vol. E77-C, no. 3, pp. 515-518, March 1994, doi: .
Abstract: A technique to realize a transconductance which is relatively insensitive over temperature variations is reported. Simulation results with MOS and bipolar transistors indicate substantial improvement in temperature insensitivity over a range exceeding 100 degrees Celsius. It should find useful applications in analog LSI/VLSI systems operating over a wide range of temperature.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e77-c_3_515/_p

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@ARTICLE{e77-c_3_515,
author={Rabin RAUT, },
journal={IEICE TRANSACTIONS on Electronics},
title={Temperature Adaptive Voltage Reference Network for Realizing a Transconductance with Low Temperature Sensitivity},
year={1994},
volume={E77-C},
number={3},
pages={515-518},
abstract={A technique to realize a transconductance which is relatively insensitive over temperature variations is reported. Simulation results with MOS and bipolar transistors indicate substantial improvement in temperature insensitivity over a range exceeding 100 degrees Celsius. It should find useful applications in analog LSI/VLSI systems operating over a wide range of temperature.},
keywords={},
doi={},
ISSN={},
month={March},}

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TY - JOUR
TI - Temperature Adaptive Voltage Reference Network for Realizing a Transconductance with Low Temperature Sensitivity
T2 - IEICE TRANSACTIONS on Electronics
SP - 515
EP - 518
AU - Rabin RAUT
PY - 1994
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E77-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 1994
AB - A technique to realize a transconductance which is relatively insensitive over temperature variations is reported. Simulation results with MOS and bipolar transistors indicate substantial improvement in temperature insensitivity over a range exceeding 100 degrees Celsius. It should find useful applications in analog LSI/VLSI systems operating over a wide range of temperature.
ER -