Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme

Katsutaka KIMURA; Toshihiro TANAKA; Masataka KATO; Tetsuo ADACHI; Keisuke OGURA; Hitoshi KUME

Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme

Katsutaka KIMURA, Toshihiro TANAKA, Masataka KATO, Tetsuo ADACHI, Keisuke OGURA, Hitoshi KUME

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Programming and program-verification methods for low-voltage flash memories using the Fowler-Nordheim tunneling mechanism for both programming and erasure are described. In these memories, a great many memory cells on a selected word line, such as 512-bytes worth of cells, are programmed at the same time for high-speed programming. The bit-by-bit programming/verification method can precisely control threshold-voltage deviation of programmed memory cells on the selected word line for low voltage operation. By using an internal program-end detection circuit, the completion of program mode can be checked for in one clock cycle, without reading out 512-bytes of data from the memory chip to the external controller. Moreover, the variable pulse-width programming method reduces the total number of verifications.

Publication: IEICE TRANSACTIONS on Electronics Vol.E78-C No.7 pp.832-837

Publication Date: 1995/07/25

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Type of Manuscript: Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age)

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Katsutaka KIMURA, Toshihiro TANAKA, Masataka KATO, Tetsuo ADACHI, Keisuke OGURA, Hitoshi KUME, "Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme" in IEICE TRANSACTIONS on Electronics, vol. E78-C, no. 7, pp. 832-837, July 1995, doi: .
Abstract: Programming and program-verification methods for low-voltage flash memories using the Fowler-Nordheim tunneling mechanism for both programming and erasure are described. In these memories, a great many memory cells on a selected word line, such as 512-bytes worth of cells, are programmed at the same time for high-speed programming. The bit-by-bit programming/verification method can precisely control threshold-voltage deviation of programmed memory cells on the selected word line for low voltage operation. By using an internal program-end detection circuit, the completion of program mode can be checked for in one clock cycle, without reading out 512-bytes of data from the memory chip to the external controller. Moreover, the variable pulse-width programming method reduces the total number of verifications.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e78-c_7_832/_p

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@ARTICLE{e78-c_7_832,
author={Katsutaka KIMURA, Toshihiro TANAKA, Masataka KATO, Tetsuo ADACHI, Keisuke OGURA, Hitoshi KUME, },
journal={IEICE TRANSACTIONS on Electronics},
title={Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme},
year={1995},
volume={E78-C},
number={7},
pages={832-837},
abstract={Programming and program-verification methods for low-voltage flash memories using the Fowler-Nordheim tunneling mechanism for both programming and erasure are described. In these memories, a great many memory cells on a selected word line, such as 512-bytes worth of cells, are programmed at the same time for high-speed programming. The bit-by-bit programming/verification method can precisely control threshold-voltage deviation of programmed memory cells on the selected word line for low voltage operation. By using an internal program-end detection circuit, the completion of program mode can be checked for in one clock cycle, without reading out 512-bytes of data from the memory chip to the external controller. Moreover, the variable pulse-width programming method reduces the total number of verifications.},
keywords={},
doi={},
ISSN={},
month={July},}

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TY - JOUR
TI - Programming and Program-Verification Methods for Low-Voltage Flash Memories Using a Sector Programming Scheme
T2 - IEICE TRANSACTIONS on Electronics
SP - 832
EP - 837
AU - Katsutaka KIMURA
AU - Toshihiro TANAKA
AU - Masataka KATO
AU - Tetsuo ADACHI
AU - Keisuke OGURA
AU - Hitoshi KUME
PY - 1995
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E78-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 1995
AB - Programming and program-verification methods for low-voltage flash memories using the Fowler-Nordheim tunneling mechanism for both programming and erasure are described. In these memories, a great many memory cells on a selected word line, such as 512-bytes worth of cells, are programmed at the same time for high-speed programming. The bit-by-bit programming/verification method can precisely control threshold-voltage deviation of programmed memory cells on the selected word line for low voltage operation. By using an internal program-end detection circuit, the completion of program mode can be checked for in one clock cycle, without reading out 512-bytes of data from the memory chip to the external controller. Moreover, the variable pulse-width programming method reduces the total number of verifications.
ER -