Low Bit-rate Video Coding Using a DSP for Consumer Applications

Hisashi INOUE; Shiro IWASAKI; Takashi KATSURA; Hitoshi FUJIMOTO; Shun-ichi KUROHMARU; Masatoshi MATSUO; Yasuo KOHASHI; Masayoshi TOUJIMA; Tomonori YONEZAWA; Kiyoshi OKAMOTO; Yasuo IIZUKA; Hiromasa NAKAJIMA; Junji MICHIYAMA

Low Bit-rate Video Coding Using a DSP for Consumer Applications

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We have developed a low bit-rate video coding using a video digital signal processor (DSP) called VDSP1_χ, which performs real-time encoding and decoding for discrete cosine transform-(DCT-) based algorithms, such as ITU-T H. 261, H. 263 and wavelet-based subband encoding algorithms. This LSI features a processing unit which implements wavelet filters at high speeds, a compact DCT circuit, and a fast, flexible DRAM interface for low-cost systems. This system is capable of processing quarter common intermediate format (QCIF)(176144 pixels) size pictures at a rate greater than 15 frames/s.

Publication: IEICE TRANSACTIONS on Electronics Vol.E81-C No.5 pp.708-717

Publication Date: 1998/05/25

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Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)

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Hisashi INOUE, Shiro IWASAKI, Takashi KATSURA, Hitoshi FUJIMOTO, Shun-ichi KUROHMARU, Masatoshi MATSUO, Yasuo KOHASHI, Masayoshi TOUJIMA, Tomonori YONEZAWA, Kiyoshi OKAMOTO, Yasuo IIZUKA, Hiromasa NAKAJIMA, Junji MICHIYAMA, "Low Bit-rate Video Coding Using a DSP for Consumer Applications" in IEICE TRANSACTIONS on Electronics, vol. E81-C, no. 5, pp. 708-717, May 1998, doi: .
Abstract: We have developed a low bit-rate video coding using a video digital signal processor (DSP) called VDSP1_χ, which performs real-time encoding and decoding for discrete cosine transform-(DCT-) based algorithms, such as ITU-T H. 261, H. 263 and wavelet-based subband encoding algorithms. This LSI features a processing unit which implements wavelet filters at high speeds, a compact DCT circuit, and a fast, flexible DRAM interface for low-cost systems. This system is capable of processing quarter common intermediate format (QCIF)(176144 pixels) size pictures at a rate greater than 15 frames/s.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e81-c_5_708/_p

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@ARTICLE{e81-c_5_708,
author={Hisashi INOUE, Shiro IWASAKI, Takashi KATSURA, Hitoshi FUJIMOTO, Shun-ichi KUROHMARU, Masatoshi MATSUO, Yasuo KOHASHI, Masayoshi TOUJIMA, Tomonori YONEZAWA, Kiyoshi OKAMOTO, Yasuo IIZUKA, Hiromasa NAKAJIMA, Junji MICHIYAMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={Low Bit-rate Video Coding Using a DSP for Consumer Applications},
year={1998},
volume={E81-C},
number={5},
pages={708-717},
abstract={We have developed a low bit-rate video coding using a video digital signal processor (DSP) called VDSP1_χ, which performs real-time encoding and decoding for discrete cosine transform-(DCT-) based algorithms, such as ITU-T H. 261, H. 263 and wavelet-based subband encoding algorithms. This LSI features a processing unit which implements wavelet filters at high speeds, a compact DCT circuit, and a fast, flexible DRAM interface for low-cost systems. This system is capable of processing quarter common intermediate format (QCIF)(176144 pixels) size pictures at a rate greater than 15 frames/s.},
keywords={},
doi={},
ISSN={},
month={May},}

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TY - JOUR
TI - Low Bit-rate Video Coding Using a DSP for Consumer Applications
T2 - IEICE TRANSACTIONS on Electronics
SP - 708
EP - 717
AU - Hisashi INOUE
AU - Shiro IWASAKI
AU - Takashi KATSURA
AU - Hitoshi FUJIMOTO
AU - Shun-ichi KUROHMARU
AU - Masatoshi MATSUO
AU - Yasuo KOHASHI
AU - Masayoshi TOUJIMA
AU - Tomonori YONEZAWA
AU - Kiyoshi OKAMOTO
AU - Yasuo IIZUKA
AU - Hiromasa NAKAJIMA
AU - Junji MICHIYAMA
PY - 1998
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E81-C
IS - 5
JA - IEICE TRANSACTIONS on Electronics
Y1 - May 1998
AB - We have developed a low bit-rate video coding using a video digital signal processor (DSP) called VDSP1_χ, which performs real-time encoding and decoding for discrete cosine transform-(DCT-) based algorithms, such as ITU-T H. 261, H. 263 and wavelet-based subband encoding algorithms. This LSI features a processing unit which implements wavelet filters at high speeds, a compact DCT circuit, and a fast, flexible DRAM interface for low-cost systems. This system is capable of processing quarter common intermediate format (QCIF)(176144 pixels) size pictures at a rate greater than 15 frames/s.
ER -