Low Voltage Low Phase Noise CMOS VCO and Its Flicker Noise Influence

Nobuyuki ITOH

Low Voltage Low Phase Noise CMOS VCO and Its Flicker Noise Influence

Nobuyuki ITOH

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The low phase noise, low supply voltage 1.3 GHz CMOS VCO has been realized by 0.25 µm standard CMOS technology without any trimming and any tuning. The phase noise characteristics of -109 dBc/Hz and -123 dBc/Hz at 100 kHz offset and 500 kHz offset were achieved from carrier, respectively, with 1.3 GHz oscillation frequency at 1.4 V supply voltage. The performance of 1.4 V supply voltage phase noise was superior to that of 2.0 V supply voltage phase noise due to low output impedance current source. The tuning ranges of 13.3%, 16.6%, and 20.1% for 1.4 V, 1.8 V, and 2.0 V supply voltage were achieved, respectively. The amplifier consisted of one pair of PMOS differential stage with large gate length NMOS current source to realize low supply voltage operation and to avoid flicker noise contribution for phase noise. The on-chip spiral inductor consisted of three terminals arranged in a special shape to obtain high Q and small chip area. The power dissipation of this VCO was 22.4 mW without buffer amplifier.

Publication: IEICE TRANSACTIONS on Electronics Vol.E86-C No.6 pp.1062-1068

Publication Date: 2003/06/01

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Type of Manuscript: Special Section PAPER (Special Issue on Devices and Circuits for Next Generation Multi-Media Communication Systems)

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Nobuyuki ITOH, "Low Voltage Low Phase Noise CMOS VCO and Its Flicker Noise Influence" in IEICE TRANSACTIONS on Electronics, vol. E86-C, no. 6, pp. 1062-1068, June 2003, doi: .
Abstract: The low phase noise, low supply voltage 1.3 GHz CMOS VCO has been realized by 0.25 µm standard CMOS technology without any trimming and any tuning. The phase noise characteristics of -109 dBc/Hz and -123 dBc/Hz at 100 kHz offset and 500 kHz offset were achieved from carrier, respectively, with 1.3 GHz oscillation frequency at 1.4 V supply voltage. The performance of 1.4 V supply voltage phase noise was superior to that of 2.0 V supply voltage phase noise due to low output impedance current source. The tuning ranges of 13.3%, 16.6%, and 20.1% for 1.4 V, 1.8 V, and 2.0 V supply voltage were achieved, respectively. The amplifier consisted of one pair of PMOS differential stage with large gate length NMOS current source to realize low supply voltage operation and to avoid flicker noise contribution for phase noise. The on-chip spiral inductor consisted of three terminals arranged in a special shape to obtain high Q and small chip area. The power dissipation of this VCO was 22.4 mW without buffer amplifier.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/e86-c_6_1062/_p

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@ARTICLE{e86-c_6_1062,
author={Nobuyuki ITOH, },
journal={IEICE TRANSACTIONS on Electronics},
title={Low Voltage Low Phase Noise CMOS VCO and Its Flicker Noise Influence},
year={2003},
volume={E86-C},
number={6},
pages={1062-1068},
abstract={The low phase noise, low supply voltage 1.3 GHz CMOS VCO has been realized by 0.25 µm standard CMOS technology without any trimming and any tuning. The phase noise characteristics of -109 dBc/Hz and -123 dBc/Hz at 100 kHz offset and 500 kHz offset were achieved from carrier, respectively, with 1.3 GHz oscillation frequency at 1.4 V supply voltage. The performance of 1.4 V supply voltage phase noise was superior to that of 2.0 V supply voltage phase noise due to low output impedance current source. The tuning ranges of 13.3%, 16.6%, and 20.1% for 1.4 V, 1.8 V, and 2.0 V supply voltage were achieved, respectively. The amplifier consisted of one pair of PMOS differential stage with large gate length NMOS current source to realize low supply voltage operation and to avoid flicker noise contribution for phase noise. The on-chip spiral inductor consisted of three terminals arranged in a special shape to obtain high Q and small chip area. The power dissipation of this VCO was 22.4 mW without buffer amplifier.},
keywords={},
doi={},
ISSN={},
month={June},}

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TY - JOUR
TI - Low Voltage Low Phase Noise CMOS VCO and Its Flicker Noise Influence
T2 - IEICE TRANSACTIONS on Electronics
SP - 1062
EP - 1068
AU - Nobuyuki ITOH
PY - 2003
DO -
JO - IEICE TRANSACTIONS on Electronics
SN -
VL - E86-C
IS - 6
JA - IEICE TRANSACTIONS on Electronics
Y1 - June 2003
AB - The low phase noise, low supply voltage 1.3 GHz CMOS VCO has been realized by 0.25 µm standard CMOS technology without any trimming and any tuning. The phase noise characteristics of -109 dBc/Hz and -123 dBc/Hz at 100 kHz offset and 500 kHz offset were achieved from carrier, respectively, with 1.3 GHz oscillation frequency at 1.4 V supply voltage. The performance of 1.4 V supply voltage phase noise was superior to that of 2.0 V supply voltage phase noise due to low output impedance current source. The tuning ranges of 13.3%, 16.6%, and 20.1% for 1.4 V, 1.8 V, and 2.0 V supply voltage were achieved, respectively. The amplifier consisted of one pair of PMOS differential stage with large gate length NMOS current source to realize low supply voltage operation and to avoid flicker noise contribution for phase noise. The on-chip spiral inductor consisted of three terminals arranged in a special shape to obtain high Q and small chip area. The power dissipation of this VCO was 22.4 mW without buffer amplifier.
ER -