In this letter, a novel body bias selection scheme for minimizing the leakage of MOS transistors is presented. The proposed scheme directly monitors leakages at present and adjacent body bias voltages, and dynamically updates the voltage at which the leakage is minimized regardless of process and temperature variations. Comparison results in a 46 nm CMOS technology indicated that the proposed scheme achieved leakage reductions of up to 68% as compared to conventional body biasing schemes.
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Dong-Su LEE, Sung-Chan KANG, Young-Hyun JUN, Bai-Sun KONG, "A Novel Body Bias Selection Scheme for Leakage Minimization" in IEICE TRANSACTIONS on Electronics,
vol. E94-C, no. 9, pp. 1490-1493, September 2011, doi: 10.1587/transele.E94.C.1490.
Abstract: In this letter, a novel body bias selection scheme for minimizing the leakage of MOS transistors is presented. The proposed scheme directly monitors leakages at present and adjacent body bias voltages, and dynamically updates the voltage at which the leakage is minimized regardless of process and temperature variations. Comparison results in a 46 nm CMOS technology indicated that the proposed scheme achieved leakage reductions of up to 68% as compared to conventional body biasing schemes.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E94.C.1490/_p
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@ARTICLE{e94-c_9_1490,
author={Dong-Su LEE, Sung-Chan KANG, Young-Hyun JUN, Bai-Sun KONG, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Novel Body Bias Selection Scheme for Leakage Minimization},
year={2011},
volume={E94-C},
number={9},
pages={1490-1493},
abstract={In this letter, a novel body bias selection scheme for minimizing the leakage of MOS transistors is presented. The proposed scheme directly monitors leakages at present and adjacent body bias voltages, and dynamically updates the voltage at which the leakage is minimized regardless of process and temperature variations. Comparison results in a 46 nm CMOS technology indicated that the proposed scheme achieved leakage reductions of up to 68% as compared to conventional body biasing schemes.},
keywords={},
doi={10.1587/transele.E94.C.1490},
ISSN={1745-1353},
month={September},}
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TY - JOUR
TI - A Novel Body Bias Selection Scheme for Leakage Minimization
T2 - IEICE TRANSACTIONS on Electronics
SP - 1490
EP - 1493
AU - Dong-Su LEE
AU - Sung-Chan KANG
AU - Young-Hyun JUN
AU - Bai-Sun KONG
PY - 2011
DO - 10.1587/transele.E94.C.1490
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E94-C
IS - 9
JA - IEICE TRANSACTIONS on Electronics
Y1 - September 2011
AB - In this letter, a novel body bias selection scheme for minimizing the leakage of MOS transistors is presented. The proposed scheme directly monitors leakages at present and adjacent body bias voltages, and dynamically updates the voltage at which the leakage is minimized regardless of process and temperature variations. Comparison results in a 46 nm CMOS technology indicated that the proposed scheme achieved leakage reductions of up to 68% as compared to conventional body biasing schemes.
ER -