A Single-Supply 84 dB DR Audio-Band ADC for Compact Digital Microphones

Huy-Binh LE; Sang-Gug LEE; Seung-Tak RYU

doi:10.1587/transele.E95.C.130

A Single-Supply 84 dB DR Audio-Band ADC for Compact Digital Microphones

Huy-Binh LE, Sang-Gug LEE, Seung-Tak RYU

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A 20 kHz audio-band ADC with a single pair of power and ground pads is implemented for a digital electret microphone. Under the limited power/ground pad condition, the switching noise effect on the signal quality is estimated via post simulations with parasitic models. Performance degradation is minimized by time-domain noise isolation with sufficient time-spacing between the sampling edge and the output transition. The prototype ADC was implemented in a 0.18 µm CMOS process. It operates under a minimum supply voltage of 1.6 V with total current of 420 µA. Operating at 2.56 MHz clock frequency, it achieves 84 dB dynamic range and a 64 dB peak signal-to-(noise+distortion) ratio. The measured power supply rejection at a 100 mVpp 217 Hz square wave is -72 dB.

Publication: IEICE TRANSACTIONS on Electronics Vol.E95-C No.1 pp.130-136

Publication Date: 2012/01/01

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Online ISSN: 1745-1353

DOI: 10.1587/transele.E95.C.130

Type of Manuscript: PAPER

Category: Electronic Circuits

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Huy-Binh LE, Sang-Gug LEE, Seung-Tak RYU, "A Single-Supply 84 dB DR Audio-Band ADC for Compact Digital Microphones" in IEICE TRANSACTIONS on Electronics, vol. E95-C, no. 1, pp. 130-136, January 2012, doi: 10.1587/transele.E95.C.130.
Abstract: A 20 kHz audio-band ADC with a single pair of power and ground pads is implemented for a digital electret microphone. Under the limited power/ground pad condition, the switching noise effect on the signal quality is estimated via post simulations with parasitic models. Performance degradation is minimized by time-domain noise isolation with sufficient time-spacing between the sampling edge and the output transition. The prototype ADC was implemented in a 0.18 µm CMOS process. It operates under a minimum supply voltage of 1.6 V with total current of 420 µA. Operating at 2.56 MHz clock frequency, it achieves 84 dB dynamic range and a 64 dB peak signal-to-(noise+distortion) ratio. The measured power supply rejection at a 100 mVpp 217 Hz square wave is -72 dB.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E95.C.130/_p

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@ARTICLE{e95-c_1_130,
author={Huy-Binh LE, Sang-Gug LEE, Seung-Tak RYU, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Single-Supply 84 dB DR Audio-Band ADC for Compact Digital Microphones},
year={2012},
volume={E95-C},
number={1},
pages={130-136},
abstract={A 20 kHz audio-band ADC with a single pair of power and ground pads is implemented for a digital electret microphone. Under the limited power/ground pad condition, the switching noise effect on the signal quality is estimated via post simulations with parasitic models. Performance degradation is minimized by time-domain noise isolation with sufficient time-spacing between the sampling edge and the output transition. The prototype ADC was implemented in a 0.18 µm CMOS process. It operates under a minimum supply voltage of 1.6 V with total current of 420 µA. Operating at 2.56 MHz clock frequency, it achieves 84 dB dynamic range and a 64 dB peak signal-to-(noise+distortion) ratio. The measured power supply rejection at a 100 mVpp 217 Hz square wave is -72 dB.},
keywords={},
doi={10.1587/transele.E95.C.130},
ISSN={1745-1353},
month={January},}

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TY - JOUR
TI - A Single-Supply 84 dB DR Audio-Band ADC for Compact Digital Microphones
T2 - IEICE TRANSACTIONS on Electronics
SP - 130
EP - 136
AU - Huy-Binh LE
AU - Sang-Gug LEE
AU - Seung-Tak RYU
PY - 2012
DO - 10.1587/transele.E95.C.130
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E95-C
IS - 1
JA - IEICE TRANSACTIONS on Electronics
Y1 - January 2012
AB - A 20 kHz audio-band ADC with a single pair of power and ground pads is implemented for a digital electret microphone. Under the limited power/ground pad condition, the switching noise effect on the signal quality is estimated via post simulations with parasitic models. Performance degradation is minimized by time-domain noise isolation with sufficient time-spacing between the sampling edge and the output transition. The prototype ADC was implemented in a 0.18 µm CMOS process. It operates under a minimum supply voltage of 1.6 V with total current of 420 µA. Operating at 2.56 MHz clock frequency, it achieves 84 dB dynamic range and a 64 dB peak signal-to-(noise+distortion) ratio. The measured power supply rejection at a 100 mVpp 217 Hz square wave is -72 dB.
ER -