A Method for Measuring of RTN by Boosting Word-Line Voltage in 6-Tr-SRAMs

Goichi ONO; Yuki MORI; Michiaki NAKAYAMA; Yusuke KANNO

doi:10.1587/transele.E97.C.215

A Method for Measuring of RTN by Boosting Word-Line Voltage in 6-Tr-SRAMs

Goichi ONO, Yuki MORI, Michiaki NAKAYAMA, Yusuke KANNO

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Summary :

In order to analyze an impact of threshold voltage (Vth) fluctuation induced by random telegraph noise (RTN) on LSI circuit design, we measured a 40-nm 6-Tr-SRAM TEG which enables to evaluate individual bit-line current. RTN phenomenon was successfully measured and we also identified that the transfer MOSFET in an SRAM bit-cell was the most sensitive MOSFET. The proposed word line boosting technique, which applies slightly extra stress to the transfer MOSFET, improves about 30% of detecting probability of fail-bit cells caused by RTN.

Publication: IEICE TRANSACTIONS on Electronics Vol.E97-C No.3 pp.215-221

Publication Date: 2014/03/01

Publicized

Online ISSN: 1745-1353

DOI: 10.1587/transele.E97.C.215

Type of Manuscript: PAPER

Category: Integrated Electronics

Authors

Goichi ONO
  Hitachi, Ltd.,Kobe University
Yuki MORI
  Hitachi, Ltd.
Michiaki NAKAYAMA
  Hitachi Ltd.
Yusuke KANNO
  Hitachi, Ltd.

Keyword

random telegraph noise, static random access memory

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Goichi ONO, Yuki MORI, Michiaki NAKAYAMA, Yusuke KANNO, "A Method for Measuring of RTN by Boosting Word-Line Voltage in 6-Tr-SRAMs" in IEICE TRANSACTIONS on Electronics, vol. E97-C, no. 3, pp. 215-221, March 2014, doi: 10.1587/transele.E97.C.215.
Abstract: In order to analyze an impact of threshold voltage (Vth) fluctuation induced by random telegraph noise (RTN) on LSI circuit design, we measured a 40-nm 6-Tr-SRAM TEG which enables to evaluate individual bit-line current. RTN phenomenon was successfully measured and we also identified that the transfer MOSFET in an SRAM bit-cell was the most sensitive MOSFET. The proposed word line boosting technique, which applies slightly extra stress to the transfer MOSFET, improves about 30% of detecting probability of fail-bit cells caused by RTN.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E97.C.215/_p

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@ARTICLE{e97-c_3_215,
author={Goichi ONO, Yuki MORI, Michiaki NAKAYAMA, Yusuke KANNO, },
journal={IEICE TRANSACTIONS on Electronics},
title={A Method for Measuring of RTN by Boosting Word-Line Voltage in 6-Tr-SRAMs},
year={2014},
volume={E97-C},
number={3},
pages={215-221},
abstract={In order to analyze an impact of threshold voltage (Vth) fluctuation induced by random telegraph noise (RTN) on LSI circuit design, we measured a 40-nm 6-Tr-SRAM TEG which enables to evaluate individual bit-line current. RTN phenomenon was successfully measured and we also identified that the transfer MOSFET in an SRAM bit-cell was the most sensitive MOSFET. The proposed word line boosting technique, which applies slightly extra stress to the transfer MOSFET, improves about 30% of detecting probability of fail-bit cells caused by RTN.},
keywords={},
doi={10.1587/transele.E97.C.215},
ISSN={1745-1353},
month={March},}

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TY - JOUR
TI - A Method for Measuring of RTN by Boosting Word-Line Voltage in 6-Tr-SRAMs
T2 - IEICE TRANSACTIONS on Electronics
SP - 215
EP - 221
AU - Goichi ONO
AU - Yuki MORI
AU - Michiaki NAKAYAMA
AU - Yusuke KANNO
PY - 2014
DO - 10.1587/transele.E97.C.215
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E97-C
IS - 3
JA - IEICE TRANSACTIONS on Electronics
Y1 - March 2014
AB - In order to analyze an impact of threshold voltage (Vth) fluctuation induced by random telegraph noise (RTN) on LSI circuit design, we measured a 40-nm 6-Tr-SRAM TEG which enables to evaluate individual bit-line current. RTN phenomenon was successfully measured and we also identified that the transfer MOSFET in an SRAM bit-cell was the most sensitive MOSFET. The proposed word line boosting technique, which applies slightly extra stress to the transfer MOSFET, improves about 30% of detecting probability of fail-bit cells caused by RTN.
ER -