An energy-efficient power-aware design is highly desirable for DSP functions that encounter a wide diversity of operating scenarios in battery-powered wireless sensor network systems. Addressing this issue, this letter presents a low-power power-aware scalable pipelined Booth multiplier that makes use of dynamic-range detection unit, sharing common functional units, ensemble of optimized Wallace-trees and a 4-bit array-based adder-tree for DSP applications.
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Hanho LEE, "Power-Aware Scalable Pipelined Booth Multiplier" in IEICE TRANSACTIONS on Fundamentals,
vol. E88-A, no. 11, pp. 3230-3234, November 2005, doi: 10.1093/ietfec/e88-a.11.3230.
Abstract: An energy-efficient power-aware design is highly desirable for DSP functions that encounter a wide diversity of operating scenarios in battery-powered wireless sensor network systems. Addressing this issue, this letter presents a low-power power-aware scalable pipelined Booth multiplier that makes use of dynamic-range detection unit, sharing common functional units, ensemble of optimized Wallace-trees and a 4-bit array-based adder-tree for DSP applications.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.11.3230/_p
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@ARTICLE{e88-a_11_3230,
author={Hanho LEE, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Power-Aware Scalable Pipelined Booth Multiplier},
year={2005},
volume={E88-A},
number={11},
pages={3230-3234},
abstract={An energy-efficient power-aware design is highly desirable for DSP functions that encounter a wide diversity of operating scenarios in battery-powered wireless sensor network systems. Addressing this issue, this letter presents a low-power power-aware scalable pipelined Booth multiplier that makes use of dynamic-range detection unit, sharing common functional units, ensemble of optimized Wallace-trees and a 4-bit array-based adder-tree for DSP applications.},
keywords={},
doi={10.1093/ietfec/e88-a.11.3230},
ISSN={},
month={November},}
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TY - JOUR
TI - Power-Aware Scalable Pipelined Booth Multiplier
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3230
EP - 3234
AU - Hanho LEE
PY - 2005
DO - 10.1093/ietfec/e88-a.11.3230
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 11
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - November 2005
AB - An energy-efficient power-aware design is highly desirable for DSP functions that encounter a wide diversity of operating scenarios in battery-powered wireless sensor network systems. Addressing this issue, this letter presents a low-power power-aware scalable pipelined Booth multiplier that makes use of dynamic-range detection unit, sharing common functional units, ensemble of optimized Wallace-trees and a 4-bit array-based adder-tree for DSP applications.
ER -