Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications

Satoshi KOMATSU; Masahiro FUJITA

doi:10.1093/ietfec/e88-a.12.3282

Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications

Satoshi KOMATSU, Masahiro FUJITA

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Energy consumption is one of the most critical constraints in the current VLSI system designs. In addition, fault tolerance of VLSI systems will be also one of the most important requirements in the future shrunk VLSIs. This paper proposes practical low power and fault tolerant bus encoding methods in on-chip data transfer. The proposed encoding methods use the combination of simple low power code and fault tolerant code. Experimental results show that the proposed methods can reduce signal transitions by 23% on the bus with fault tolerance. In addition, circuit implementation results with bus signal swing optimization show the effectiveness of the proposed encoding methods. We show also the selection methodology of the optimum encoding method under the given requirements.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E88-A No.12 pp.3282-3289

Publication Date: 2005/12/01

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DOI: 10.1093/ietfec/e88-a.12.3282

Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)

Category: Low Power Methodology

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Satoshi KOMATSU, Masahiro FUJITA, "Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications" in IEICE TRANSACTIONS on Fundamentals, vol. E88-A, no. 12, pp. 3282-3289, December 2005, doi: 10.1093/ietfec/e88-a.12.3282.
Abstract: Energy consumption is one of the most critical constraints in the current VLSI system designs. In addition, fault tolerance of VLSI systems will be also one of the most important requirements in the future shrunk VLSIs. This paper proposes practical low power and fault tolerant bus encoding methods in on-chip data transfer. The proposed encoding methods use the combination of simple low power code and fault tolerant code. Experimental results show that the proposed methods can reduce signal transitions by 23% on the bus with fault tolerance. In addition, circuit implementation results with bus signal swing optimization show the effectiveness of the proposed encoding methods. We show also the selection methodology of the optimum encoding method under the given requirements.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.12.3282/_p

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@ARTICLE{e88-a_12_3282,
author={Satoshi KOMATSU, Masahiro FUJITA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications},
year={2005},
volume={E88-A},
number={12},
pages={3282-3289},
abstract={Energy consumption is one of the most critical constraints in the current VLSI system designs. In addition, fault tolerance of VLSI systems will be also one of the most important requirements in the future shrunk VLSIs. This paper proposes practical low power and fault tolerant bus encoding methods in on-chip data transfer. The proposed encoding methods use the combination of simple low power code and fault tolerant code. Experimental results show that the proposed methods can reduce signal transitions by 23% on the bus with fault tolerance. In addition, circuit implementation results with bus signal swing optimization show the effectiveness of the proposed encoding methods. We show also the selection methodology of the optimum encoding method under the given requirements.},
keywords={},
doi={10.1093/ietfec/e88-a.12.3282},
ISSN={},
month={December},}

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TY - JOUR
TI - Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3282
EP - 3289
AU - Satoshi KOMATSU
AU - Masahiro FUJITA
PY - 2005
DO - 10.1093/ietfec/e88-a.12.3282
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2005
AB - Energy consumption is one of the most critical constraints in the current VLSI system designs. In addition, fault tolerance of VLSI systems will be also one of the most important requirements in the future shrunk VLSIs. This paper proposes practical low power and fault tolerant bus encoding methods in on-chip data transfer. The proposed encoding methods use the combination of simple low power code and fault tolerant code. Experimental results show that the proposed methods can reduce signal transitions by 23% on the bus with fault tolerance. In addition, circuit implementation results with bus signal swing optimization show the effectiveness of the proposed encoding methods. We show also the selection methodology of the optimum encoding method under the given requirements.
ER -