Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era

Kentaro KAWAKAMI; Miwako KANAMORI; Yasuhiro MORITA; Jun TAKEMURA; Masayuki MIYAMA; Masahiko YOSHIMOTO

doi:10.1093/ietfec/e88-a.12.3290

Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era

Kentaro KAWAKAMI, Miwako KANAMORI, Yasuhiro MORITA, Jun TAKEMURA, Masayuki MIYAMA, Masahiko YOSHIMOTO

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To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control processor has been proposed. The processor schedules its operating frequency according to the required computation power. Its operating voltage or body bias voltage is adequately modulated simultaneously to effectively cut down either switching current or leakage current, and it results in reduction of total power dissipation of the processor. Since a frequency-voltage cooperative control processor has two or more operating frequencies, there are countless scheduling methods exist to realize a certain number of cycles by deadline time. This proposition is frequently appears in a hard real-time system. This paper proves two important theorems, which give the power-minimum frequency scheduling method for any types of frequency-voltage cooperative control processor, such as V_dd-control type, V_th-control type and V_dd-V_th-control type processors.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E88-A No.12 pp.3290-3297

Publication Date: 2005/12/01

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DOI: 10.1093/ietfec/e88-a.12.3290

Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)

Category: Low Power Methodology

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Kentaro KAWAKAMI, Miwako KANAMORI, Yasuhiro MORITA, Jun TAKEMURA, Masayuki MIYAMA, Masahiko YOSHIMOTO, "Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era" in IEICE TRANSACTIONS on Fundamentals, vol. E88-A, no. 12, pp. 3290-3297, December 2005, doi: 10.1093/ietfec/e88-a.12.3290.
Abstract: To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control processor has been proposed. The processor schedules its operating frequency according to the required computation power. Its operating voltage or body bias voltage is adequately modulated simultaneously to effectively cut down either switching current or leakage current, and it results in reduction of total power dissipation of the processor. Since a frequency-voltage cooperative control processor has two or more operating frequencies, there are countless scheduling methods exist to realize a certain number of cycles by deadline time. This proposition is frequently appears in a hard real-time system. This paper proves two important theorems, which give the power-minimum frequency scheduling method for any types of frequency-voltage cooperative control processor, such as V_dd-control type, V_th-control type and V_dd-V_th-control type processors.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.12.3290/_p

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@ARTICLE{e88-a_12_3290,
author={Kentaro KAWAKAMI, Miwako KANAMORI, Yasuhiro MORITA, Jun TAKEMURA, Masayuki MIYAMA, Masahiko YOSHIMOTO, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era},
year={2005},
volume={E88-A},
number={12},
pages={3290-3297},
abstract={To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control processor has been proposed. The processor schedules its operating frequency according to the required computation power. Its operating voltage or body bias voltage is adequately modulated simultaneously to effectively cut down either switching current or leakage current, and it results in reduction of total power dissipation of the processor. Since a frequency-voltage cooperative control processor has two or more operating frequencies, there are countless scheduling methods exist to realize a certain number of cycles by deadline time. This proposition is frequently appears in a hard real-time system. This paper proves two important theorems, which give the power-minimum frequency scheduling method for any types of frequency-voltage cooperative control processor, such as V_dd-control type, V_th-control type and V_dd-V_th-control type processors.},
keywords={},
doi={10.1093/ietfec/e88-a.12.3290},
ISSN={},
month={December},}

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TY - JOUR
TI - Power-Minimum Frequency/Voltage Cooperative Management Method for VLSI Processor in Leakage-Dominant Technology Era
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 3290
EP - 3297
AU - Kentaro KAWAKAMI
AU - Miwako KANAMORI
AU - Yasuhiro MORITA
AU - Jun TAKEMURA
AU - Masayuki MIYAMA
AU - Masahiko YOSHIMOTO
PY - 2005
DO - 10.1093/ietfec/e88-a.12.3290
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2005
AB - To achieve both of a high peak performance and low average power characteristics, frequency-voltage cooperative control processor has been proposed. The processor schedules its operating frequency according to the required computation power. Its operating voltage or body bias voltage is adequately modulated simultaneously to effectively cut down either switching current or leakage current, and it results in reduction of total power dissipation of the processor. Since a frequency-voltage cooperative control processor has two or more operating frequencies, there are countless scheduling methods exist to realize a certain number of cycles by deadline time. This proposition is frequently appears in a hard real-time system. This paper proves two important theorems, which give the power-minimum frequency scheduling method for any types of frequency-voltage cooperative control processor, such as V_dd-control type, V_th-control type and V_dd-V_th-control type processors.
ER -