Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification

Yuhei KANEKO; Nobuhiko SUGINO; Akinori NISHIHARA

doi:10.1093/ietfec/e88-a.4.846

Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification

Yuhei KANEKO, Nobuhiko SUGINO, Akinori NISHIHARA

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A memory address allocation method for digital signal processors of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then, address allocation of program variables are moved and shifted so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, a memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E88-A No.4 pp.846-854

Publication Date: 2005/04/01

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DOI: 10.1093/ietfec/e88-a.4.846

Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)

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Yuhei KANEKO, Nobuhiko SUGINO, Akinori NISHIHARA, "Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification" in IEICE TRANSACTIONS on Fundamentals, vol. E88-A, no. 4, pp. 846-854, April 2005, doi: 10.1093/ietfec/e88-a.4.846.
Abstract: A memory address allocation method for digital signal processors of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then, address allocation of program variables are moved and shifted so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, a memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e88-a.4.846/_p

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@ARTICLE{e88-a_4_846,
author={Yuhei KANEKO, Nobuhiko SUGINO, Akinori NISHIHARA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification},
year={2005},
volume={E88-A},
number={4},
pages={846-854},
abstract={A memory address allocation method for digital signal processors of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then, address allocation of program variables are moved and shifted so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, a memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.},
keywords={},
doi={10.1093/ietfec/e88-a.4.846},
ISSN={},
month={April},}

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TY - JOUR
TI - Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 846
EP - 854
AU - Yuhei KANEKO
AU - Nobuhiko SUGINO
AU - Akinori NISHIHARA
PY - 2005
DO - 10.1093/ietfec/e88-a.4.846
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E88-A
IS - 4
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - April 2005
AB - A memory address allocation method for digital signal processors of indirect addressing with indexed auto-modification is proposed. At first, address auto-modification amounts for a given program are analyzed. And then, address allocation of program variables are moved and shifted so that both indexed and simple auto-modifications are effectively exploited. For further reduction in overhead codes, a memory address allocation method coupled with computational reordering is proposed. The proposed methods are applied to the existing compiler, and generated codes prove their effectiveness.
ER -