An Efficient and Reliable Watermarking System for IP Protection

Tingyuan NIE; Masahiko TOYONAGA

doi:10.1093/ietfec/e90-a.9.1932

An Efficient and Reliable Watermarking System for IP Protection

Tingyuan NIE, Masahiko TOYONAGA

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IP (Intellectual Property) reuse plays an important role in modern IC design so that IP Protection (IPP) technique is get concerned. In this paper, we introduce a new efficient watermarking system for IPP on post-layout design stage. The signature (which indicates the designer) is encrypted with a secret key by DES (Data Encryption Standard) to produce a bit string, which is then embedded into the layout design as constraints by using a specific incremental router. Once the design is watermarked successfully, the signature can be extracted accurately by the system. The system also has a strong resistance to the attack on watermarking due to the DES functionality. This watermarking technique uniquely identifies the circuit origin, yet is difficult to be detected or fabricated without our tool. We evaluated the watermarking system on IBM-PLACE 2.0 benchmark suites. The results show the system robustness and strength: the system success probability achieves 100% in suitable time with no extra area and wire length cost on design performances.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E90-A No.9 pp.1932-1939

Publication Date: 2007/09/01

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Online ISSN: 1745-1337

DOI: 10.1093/ietfec/e90-a.9.1932

Type of Manuscript: PAPER

Category: VLSI Design Technology and CAD

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Tingyuan NIE, Masahiko TOYONAGA, "An Efficient and Reliable Watermarking System for IP Protection" in IEICE TRANSACTIONS on Fundamentals, vol. E90-A, no. 9, pp. 1932-1939, September 2007, doi: 10.1093/ietfec/e90-a.9.1932.
Abstract: IP (Intellectual Property) reuse plays an important role in modern IC design so that IP Protection (IPP) technique is get concerned. In this paper, we introduce a new efficient watermarking system for IPP on post-layout design stage. The signature (which indicates the designer) is encrypted with a secret key by DES (Data Encryption Standard) to produce a bit string, which is then embedded into the layout design as constraints by using a specific incremental router. Once the design is watermarked successfully, the signature can be extracted accurately by the system. The system also has a strong resistance to the attack on watermarking due to the DES functionality. This watermarking technique uniquely identifies the circuit origin, yet is difficult to be detected or fabricated without our tool. We evaluated the watermarking system on IBM-PLACE 2.0 benchmark suites. The results show the system robustness and strength: the system success probability achieves 100% in suitable time with no extra area and wire length cost on design performances.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e90-a.9.1932/_p

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@ARTICLE{e90-a_9_1932,
author={Tingyuan NIE, Masahiko TOYONAGA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={An Efficient and Reliable Watermarking System for IP Protection},
year={2007},
volume={E90-A},
number={9},
pages={1932-1939},
abstract={IP (Intellectual Property) reuse plays an important role in modern IC design so that IP Protection (IPP) technique is get concerned. In this paper, we introduce a new efficient watermarking system for IPP on post-layout design stage. The signature (which indicates the designer) is encrypted with a secret key by DES (Data Encryption Standard) to produce a bit string, which is then embedded into the layout design as constraints by using a specific incremental router. Once the design is watermarked successfully, the signature can be extracted accurately by the system. The system also has a strong resistance to the attack on watermarking due to the DES functionality. This watermarking technique uniquely identifies the circuit origin, yet is difficult to be detected or fabricated without our tool. We evaluated the watermarking system on IBM-PLACE 2.0 benchmark suites. The results show the system robustness and strength: the system success probability achieves 100% in suitable time with no extra area and wire length cost on design performances.},
keywords={},
doi={10.1093/ietfec/e90-a.9.1932},
ISSN={1745-1337},
month={September},}

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TY - JOUR
TI - An Efficient and Reliable Watermarking System for IP Protection
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1932
EP - 1939
AU - Tingyuan NIE
AU - Masahiko TOYONAGA
PY - 2007
DO - 10.1093/ietfec/e90-a.9.1932
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E90-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2007
AB - IP (Intellectual Property) reuse plays an important role in modern IC design so that IP Protection (IPP) technique is get concerned. In this paper, we introduce a new efficient watermarking system for IPP on post-layout design stage. The signature (which indicates the designer) is encrypted with a secret key by DES (Data Encryption Standard) to produce a bit string, which is then embedded into the layout design as constraints by using a specific incremental router. Once the design is watermarked successfully, the signature can be extracted accurately by the system. The system also has a strong resistance to the attack on watermarking due to the DES functionality. This watermarking technique uniquely identifies the circuit origin, yet is difficult to be detected or fabricated without our tool. We evaluated the watermarking system on IBM-PLACE 2.0 benchmark suites. The results show the system robustness and strength: the system success probability achieves 100% in suitable time with no extra area and wire length cost on design performances.
ER -