Fixed-Point Error Analysis of CORDIC Arithmetic for Special-Purpose Signal Processors

Tze-Yun SUNG; Hsi-Chin HSIN

doi:10.1093/ietfec/e90-a.9.2006

Fixed-Point Error Analysis of CORDIC Arithmetic for Special-Purpose Signal Processors

Tze-Yun SUNG, Hsi-Chin HSIN

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CORDIC (COordinate Rotation DIgital Computer) is a well known algorithm using simple adders and shifters to evaluate various elementary functions. Thus, CORDIC is suitable for the design of high performance chips using VLSI technology. In this paper, a complete analysis of the computation error of both the (conventional) CORDIC algorithm and the CORDIC algorithm with expanded convergence range is derived to facilitate the design task. The resulting formulas regarding the relative and absolute approximation errors and the truncation error are summarized in the tabular form. As the numerical accuracy of CORDIC processors is determined by the word length of operands and the number of iterations, three reference tables are constructed for the optimal choice of these numbers. These tables can be used to facilitate the design of cost-effective CORDIC processors in terms of areas and performances. In addition, two design examples: singular value decomposition (SVD) and lattice filter for digital signal processing systems are given to demonstrate the goal and benefit of the derived numerical analysis of CORDIC.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E90-A No.9 pp.2006-2013

Publication Date: 2007/09/01

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Online ISSN: 1745-1337

DOI: 10.1093/ietfec/e90-a.9.2006

Type of Manuscript: LETTER

Category: Digital Signal Processing

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Tze-Yun SUNG, Hsi-Chin HSIN, "Fixed-Point Error Analysis of CORDIC Arithmetic for Special-Purpose Signal Processors" in IEICE TRANSACTIONS on Fundamentals, vol. E90-A, no. 9, pp. 2006-2013, September 2007, doi: 10.1093/ietfec/e90-a.9.2006.
Abstract: CORDIC (COordinate Rotation DIgital Computer) is a well known algorithm using simple adders and shifters to evaluate various elementary functions. Thus, CORDIC is suitable for the design of high performance chips using VLSI technology. In this paper, a complete analysis of the computation error of both the (conventional) CORDIC algorithm and the CORDIC algorithm with expanded convergence range is derived to facilitate the design task. The resulting formulas regarding the relative and absolute approximation errors and the truncation error are summarized in the tabular form. As the numerical accuracy of CORDIC processors is determined by the word length of operands and the number of iterations, three reference tables are constructed for the optimal choice of these numbers. These tables can be used to facilitate the design of cost-effective CORDIC processors in terms of areas and performances. In addition, two design examples: singular value decomposition (SVD) and lattice filter for digital signal processing systems are given to demonstrate the goal and benefit of the derived numerical analysis of CORDIC.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1093/ietfec/e90-a.9.2006/_p

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@ARTICLE{e90-a_9_2006,
author={Tze-Yun SUNG, Hsi-Chin HSIN, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Fixed-Point Error Analysis of CORDIC Arithmetic for Special-Purpose Signal Processors},
year={2007},
volume={E90-A},
number={9},
pages={2006-2013},
abstract={CORDIC (COordinate Rotation DIgital Computer) is a well known algorithm using simple adders and shifters to evaluate various elementary functions. Thus, CORDIC is suitable for the design of high performance chips using VLSI technology. In this paper, a complete analysis of the computation error of both the (conventional) CORDIC algorithm and the CORDIC algorithm with expanded convergence range is derived to facilitate the design task. The resulting formulas regarding the relative and absolute approximation errors and the truncation error are summarized in the tabular form. As the numerical accuracy of CORDIC processors is determined by the word length of operands and the number of iterations, three reference tables are constructed for the optimal choice of these numbers. These tables can be used to facilitate the design of cost-effective CORDIC processors in terms of areas and performances. In addition, two design examples: singular value decomposition (SVD) and lattice filter for digital signal processing systems are given to demonstrate the goal and benefit of the derived numerical analysis of CORDIC.},
keywords={},
doi={10.1093/ietfec/e90-a.9.2006},
ISSN={1745-1337},
month={September},}

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TY - JOUR
TI - Fixed-Point Error Analysis of CORDIC Arithmetic for Special-Purpose Signal Processors
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2006
EP - 2013
AU - Tze-Yun SUNG
AU - Hsi-Chin HSIN
PY - 2007
DO - 10.1093/ietfec/e90-a.9.2006
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E90-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 2007
AB - CORDIC (COordinate Rotation DIgital Computer) is a well known algorithm using simple adders and shifters to evaluate various elementary functions. Thus, CORDIC is suitable for the design of high performance chips using VLSI technology. In this paper, a complete analysis of the computation error of both the (conventional) CORDIC algorithm and the CORDIC algorithm with expanded convergence range is derived to facilitate the design task. The resulting formulas regarding the relative and absolute approximation errors and the truncation error are summarized in the tabular form. As the numerical accuracy of CORDIC processors is determined by the word length of operands and the number of iterations, three reference tables are constructed for the optimal choice of these numbers. These tables can be used to facilitate the design of cost-effective CORDIC processors in terms of areas and performances. In addition, two design examples: singular value decomposition (SVD) and lattice filter for digital signal processing systems are given to demonstrate the goal and benefit of the derived numerical analysis of CORDIC.
ER -