Fully Balanced CMOS Current-Mode Filters for High-Frequency Applications

Yoichi ISHIZUKA, Mamoru SASAKI

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Summary :

A CMOS fully balanced current-mode filter is presented. A fully balanced current-mode integrator which is the basic building block is implemented by adding a very simple common-mode-rejection mechanism to fully differential one. The fully balanced operation can eliminate even order distortion, which is one of the drawbacks in previous continuous current-mode filter. Moreover, the additional circuit can work as not only common-mode-rejection mechanism but also Q-tuning circuit which compensates lossy elements due to finite output impedance of MOS FET. A prototype fifth-order low-pass lad-der filter designed in a standard digital 0.8µm CMOS process achieved a cut-off frequency (fC) of 100MHz; fC was tunable from 75MHz to 120MHz by varying a reference bias current from 50µA to 150µA. Using a single 3V power supply with a nominal reference current of 100µA, power dissipation per one pole is 30mW. The active filter area was 0.011mm2/pole and total harmonic distortion (THD) was 0.73 [%] at 80MHz, 80µA amplitude signal. Furthermore, by adjusting two bias currents, on chip automatic both frequency and Q controls are easily implemented by typical tuning systems, for example master-slave tuning systems [1].

Publication
IEICE TRANSACTIONS on Fundamentals Vol.E79-A No.6 pp.836-844
Publication Date
1996/06/25
Publicized
Online ISSN
DOI
Type of Manuscript
PAPER
Category
Analog Signal Processing

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