SAPICE: A Design Tool of CMOS Operational Amplifiers

Sang-Dae YU; Chong-Min KYUNG

SAPICE: A Design Tool of CMOS Operational Amplifiers

Sang-Dae YU, Chong-Min KYUNG

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Based on a new search strategy using circuit simulation and simulated annealing with local search, a design tool is proposed to automate design or tuning process for CMOS operational amplifiers. A special-purpose circuit simulator and some heuristics are used to accomplish the design within reasonable time. For arbitrary circuit topology and specifications, the discrete optimization of cost function is performed by global and local search. Through the comparision of design results and the design of a low-power high-speed CMOS operational amplifier usable in 10-b 25-MHz pipelined A/D converters, it has been demonstrated that this tool can be used for designing high-performance operational amplifiers with less design knowledge and effort.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E80-A No.9 pp.1667-1675

Publication Date: 1997/09/25

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Category: VLSI Design Technology and CAD

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Sang-Dae YU, Chong-Min KYUNG, "SAPICE: A Design Tool of CMOS Operational Amplifiers" in IEICE TRANSACTIONS on Fundamentals, vol. E80-A, no. 9, pp. 1667-1675, September 1997, doi: .
Abstract: Based on a new search strategy using circuit simulation and simulated annealing with local search, a design tool is proposed to automate design or tuning process for CMOS operational amplifiers. A special-purpose circuit simulator and some heuristics are used to accomplish the design within reasonable time. For arbitrary circuit topology and specifications, the discrete optimization of cost function is performed by global and local search. Through the comparision of design results and the design of a low-power high-speed CMOS operational amplifier usable in 10-b 25-MHz pipelined A/D converters, it has been demonstrated that this tool can be used for designing high-performance operational amplifiers with less design knowledge and effort.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/e80-a_9_1667/_p

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@ARTICLE{e80-a_9_1667,
author={Sang-Dae YU, Chong-Min KYUNG, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={SAPICE: A Design Tool of CMOS Operational Amplifiers},
year={1997},
volume={E80-A},
number={9},
pages={1667-1675},
abstract={Based on a new search strategy using circuit simulation and simulated annealing with local search, a design tool is proposed to automate design or tuning process for CMOS operational amplifiers. A special-purpose circuit simulator and some heuristics are used to accomplish the design within reasonable time. For arbitrary circuit topology and specifications, the discrete optimization of cost function is performed by global and local search. Through the comparision of design results and the design of a low-power high-speed CMOS operational amplifier usable in 10-b 25-MHz pipelined A/D converters, it has been demonstrated that this tool can be used for designing high-performance operational amplifiers with less design knowledge and effort.},
keywords={},
doi={},
ISSN={},
month={September},}

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TY - JOUR
TI - SAPICE: A Design Tool of CMOS Operational Amplifiers
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1667
EP - 1675
AU - Sang-Dae YU
AU - Chong-Min KYUNG
PY - 1997
DO -
JO - IEICE TRANSACTIONS on Fundamentals
SN -
VL - E80-A
IS - 9
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - September 1997
AB - Based on a new search strategy using circuit simulation and simulated annealing with local search, a design tool is proposed to automate design or tuning process for CMOS operational amplifiers. A special-purpose circuit simulator and some heuristics are used to accomplish the design within reasonable time. For arbitrary circuit topology and specifications, the discrete optimization of cost function is performed by global and local search. Through the comparision of design results and the design of a low-power high-speed CMOS operational amplifier usable in 10-b 25-MHz pipelined A/D converters, it has been demonstrated that this tool can be used for designing high-performance operational amplifiers with less design knowledge and effort.
ER -