Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm

Shanlin XIAO; Tsuyoshi ISSHIKI; Dongju LI; Hiroaki KUNIEDA

doi:10.1587/transfun.E100.A.1384

Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm

Shanlin XIAO, Tsuyoshi ISSHIKI, Dongju LI, Hiroaki KUNIEDA

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Object detection is at the heart of nearly all the computer vision systems. Standard off-the-shelf embedded processors are hard to meet the trade-offs among performance, power consumption and flexibility required by object detection applications. Therefore, this paper presents an Application Specific Instruction set Processor (ASIP) for object detection using AdaBoost-based learning algorithm with Haar-like features as weak classifiers. Algorithm optimizations are employed to reduce memory bandwidth requirements without losing reliability. In the proposed ASIP, Single Instruction Multiple Data (SIMD) architecture is adopted for fully exploiting data-level parallelism inherent to the target algorithm. With adding pipeline stages, application-specific hardware components and custom instructions, the AdaBoost algorithm is accelerated by a factor of 13.7x compared to the optimized pure software implementation. Compared with ARM946 and TMS320C64+, our ASIP shows 32x and 7x better throughput, 10x and 224x better area efficiency, 6.8x and 18.8x better power efficiency, respectively. Furthermore, compared to hard-wired designs, evaluation results show an advantage of the proposed architecture in terms of chip area efficiency while maintain a reliable performance and achieve real-time object detection at 32fps on VGA video.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E100-A No.7 pp.1384-1395

Publication Date: 2017/07/01

Publicized

Online ISSN: 1745-1337

DOI: 10.1587/transfun.E100.A.1384

Type of Manuscript: Special Section PAPER (Special Section on Design Methodologies for System on a Chip)

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Authors

Shanlin XIAO
  Tokyo Institute of Technology
Tsuyoshi ISSHIKI
  Tokyo Institute of Technology
Dongju LI
  Tokyo Institute of Technology
Hiroaki KUNIEDA
  Tokyo Institute of Technology

Keyword

ASIP, embedded processor, computer vision, object detection, AdaBoost

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Shanlin XIAO, Tsuyoshi ISSHIKI, Dongju LI, Hiroaki KUNIEDA, "Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm" in IEICE TRANSACTIONS on Fundamentals, vol. E100-A, no. 7, pp. 1384-1395, July 2017, doi: 10.1587/transfun.E100.A.1384.
Abstract: Object detection is at the heart of nearly all the computer vision systems. Standard off-the-shelf embedded processors are hard to meet the trade-offs among performance, power consumption and flexibility required by object detection applications. Therefore, this paper presents an Application Specific Instruction set Processor (ASIP) for object detection using AdaBoost-based learning algorithm with Haar-like features as weak classifiers. Algorithm optimizations are employed to reduce memory bandwidth requirements without losing reliability. In the proposed ASIP, Single Instruction Multiple Data (SIMD) architecture is adopted for fully exploiting data-level parallelism inherent to the target algorithm. With adding pipeline stages, application-specific hardware components and custom instructions, the AdaBoost algorithm is accelerated by a factor of 13.7x compared to the optimized pure software implementation. Compared with ARM946 and TMS320C64+, our ASIP shows 32x and 7x better throughput, 10x and 224x better area efficiency, 6.8x and 18.8x better power efficiency, respectively. Furthermore, compared to hard-wired designs, evaluation results show an advantage of the proposed architecture in terms of chip area efficiency while maintain a reliable performance and achieve real-time object detection at 32fps on VGA video.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/transfun.E100.A.1384/_p

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@ARTICLE{e100-a_7_1384,
author={Shanlin XIAO, Tsuyoshi ISSHIKI, Dongju LI, Hiroaki KUNIEDA, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm},
year={2017},
volume={E100-A},
number={7},
pages={1384-1395},
abstract={Object detection is at the heart of nearly all the computer vision systems. Standard off-the-shelf embedded processors are hard to meet the trade-offs among performance, power consumption and flexibility required by object detection applications. Therefore, this paper presents an Application Specific Instruction set Processor (ASIP) for object detection using AdaBoost-based learning algorithm with Haar-like features as weak classifiers. Algorithm optimizations are employed to reduce memory bandwidth requirements without losing reliability. In the proposed ASIP, Single Instruction Multiple Data (SIMD) architecture is adopted for fully exploiting data-level parallelism inherent to the target algorithm. With adding pipeline stages, application-specific hardware components and custom instructions, the AdaBoost algorithm is accelerated by a factor of 13.7x compared to the optimized pure software implementation. Compared with ARM946 and TMS320C64+, our ASIP shows 32x and 7x better throughput, 10x and 224x better area efficiency, 6.8x and 18.8x better power efficiency, respectively. Furthermore, compared to hard-wired designs, evaluation results show an advantage of the proposed architecture in terms of chip area efficiency while maintain a reliable performance and achieve real-time object detection at 32fps on VGA video.},
keywords={},
doi={10.1587/transfun.E100.A.1384},
ISSN={1745-1337},
month={July},}

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TY - JOUR
TI - Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 1384
EP - 1395
AU - Shanlin XIAO
AU - Tsuyoshi ISSHIKI
AU - Dongju LI
AU - Hiroaki KUNIEDA
PY - 2017
DO - 10.1587/transfun.E100.A.1384
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E100-A
IS - 7
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - July 2017
AB - Object detection is at the heart of nearly all the computer vision systems. Standard off-the-shelf embedded processors are hard to meet the trade-offs among performance, power consumption and flexibility required by object detection applications. Therefore, this paper presents an Application Specific Instruction set Processor (ASIP) for object detection using AdaBoost-based learning algorithm with Haar-like features as weak classifiers. Algorithm optimizations are employed to reduce memory bandwidth requirements without losing reliability. In the proposed ASIP, Single Instruction Multiple Data (SIMD) architecture is adopted for fully exploiting data-level parallelism inherent to the target algorithm. With adding pipeline stages, application-specific hardware components and custom instructions, the AdaBoost algorithm is accelerated by a factor of 13.7x compared to the optimized pure software implementation. Compared with ARM946 and TMS320C64+, our ASIP shows 32x and 7x better throughput, 10x and 224x better area efficiency, 6.8x and 18.8x better power efficiency, respectively. Furthermore, compared to hard-wired designs, evaluation results show an advantage of the proposed architecture in terms of chip area efficiency while maintain a reliable performance and achieve real-time object detection at 32fps on VGA video.
ER -