Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)

Yusuke YOSHIDA; Kimiyoshi USAMI

doi:10.1587/transfun.E100.A.2785

Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)

Yusuke YOSHIDA, Kimiyoshi USAMI

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This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.

Publication: IEICE TRANSACTIONS on Fundamentals Vol.E100-A No.12 pp.2785-2796

Publication Date: 2017/12/01

Publicized

Online ISSN: 1745-1337

DOI: 10.1587/transfun.E100.A.2785

Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)

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Authors

Yusuke YOSHIDA
Shibaura Institute of Technology
Kimiyoshi USAMI
Shibaura Institute of Technology

Keyword

standard cell memory, silicon-on-thin-box (SOTB), energy-efficient, ultra-low voltage, body bias

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Yusuke YOSHIDA, Kimiyoshi USAMI, "Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)" in IEICE TRANSACTIONS on Fundamentals, vol. E100-A, no. 12, pp. 2785-2796, December 2017, doi: 10.1587/transfun.E100.A.2785.
Abstract: This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.
URL: https://globals.ieice.org/en_transactions/fundamentals/10.1587/transfun.E100.A.2785/_p

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@ARTICLE{e100-a_12_2785,
author={Yusuke YOSHIDA, Kimiyoshi USAMI, },
journal={IEICE TRANSACTIONS on Fundamentals},
title={Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)},
year={2017},
volume={E100-A},
number={12},
pages={2785-2796},
abstract={This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.},
keywords={},
doi={10.1587/transfun.E100.A.2785},
ISSN={1745-1337},
month={December},}

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TY - JOUR
TI - Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)
T2 - IEICE TRANSACTIONS on Fundamentals
SP - 2785
EP - 2796
AU - Yusuke YOSHIDA
AU - Kimiyoshi USAMI
PY - 2017
DO - 10.1587/transfun.E100.A.2785
JO - IEICE TRANSACTIONS on Fundamentals
SN - 1745-1337
VL - E100-A
IS - 12
JA - IEICE TRANSACTIONS on Fundamentals
Y1 - December 2017
AB - This paper describes a design of energy-efficient Standard Cell Memory (SCM) using Silicon-on-Thin-BOX (SOTB). We present automatic place and routing (P&R) methodology for optimal body-bias separation (BBS) for SCM, which enables to apply different body bias voltages to latches and to other peripheral circuits within SCM. Capability of SOTB to effectively reduce leakage by body biasing is fully exploited in BBS. Simulation results demonstrated that our approach allows us to design SCM with 40% smaller energy dissipation at the energy minimum voltage as compared to the conventional design flow. For the process and temperature variations, Adaptive Body Bias (ABB) for SCM with our BBS provided 70% smaller leakage energy than ABB for the conventional SCM, while achieving the same clock frequency.
ER -