Dynamically Reconfigurable Logic LSI: PCA-2

Hideyuki ITO; Ryusuke KONISHI; Hiroshi NAKADA; Hideyuki TSUBOI; Yuichi OKUYAMA; Akira NAGOYA

Dynamically Reconfigurable Logic LSI: PCA-2

Hideyuki ITO, Ryusuke KONISHI, Hiroshi NAKADA, Hideyuki TSUBOI, Yuichi OKUYAMA, Akira NAGOYA

Full Text Views

0

Share
Cite this

Summary :

Design points and the results seen in the development of a dynamically reconfigurable logic LSI, PCA-2, are described. PCA-2 enables the realization of flexible parallel processing based on the autonomous reconfiguration of logic circuits. To realize this feature, we introduce an asynchronous circuit design and a homogeneous cell array structure. PCA-2 represents an advance on the earlier LSI, PCA-1. Cutting edge CMOS technology is used to realize the structural merits of PCA hardware. Compared to PCA-1, PCA-2 offers 16 times greater integration level for programmable logic. Due to miniaturization and design refinement, PCA-2 provides a 6-fold increase in the circuit frequency of the configuration controller and a 3-fold increase in the operating frequency of the programmable logic. The results gained confirm the effects of refinement and the suitability of our architecture for device miniaturization.

Publication: IEICE TRANSACTIONS on Information Vol.E87-D No.8 pp.2011-2020

Publication Date: 2004/08/01

Publicized

Online ISSN

DOI

Type of Manuscript: Special Section PAPER (Special Section on Reconfigurable Systems)

Category: Recornfigurable Systems

Cite this

Copy

Hideyuki ITO, Ryusuke KONISHI, Hiroshi NAKADA, Hideyuki TSUBOI, Yuichi OKUYAMA, Akira NAGOYA, "Dynamically Reconfigurable Logic LSI: PCA-2" in IEICE TRANSACTIONS on Information, vol. E87-D, no. 8, pp. 2011-2020, August 2004, doi: .
Abstract: Design points and the results seen in the development of a dynamically reconfigurable logic LSI, PCA-2, are described. PCA-2 enables the realization of flexible parallel processing based on the autonomous reconfiguration of logic circuits. To realize this feature, we introduce an asynchronous circuit design and a homogeneous cell array structure. PCA-2 represents an advance on the earlier LSI, PCA-1. Cutting edge CMOS technology is used to realize the structural merits of PCA hardware. Compared to PCA-1, PCA-2 offers 16 times greater integration level for programmable logic. Due to miniaturization and design refinement, PCA-2 provides a 6-fold increase in the circuit frequency of the configuration controller and a 3-fold increase in the operating frequency of the programmable logic. The results gained confirm the effects of refinement and the suitability of our architecture for device miniaturization.
URL: https://globals.ieice.org/en_transactions/information/10.1587/e87-d_8_2011/_p

Copy

@ARTICLE{e87-d_8_2011,
author={Hideyuki ITO, Ryusuke KONISHI, Hiroshi NAKADA, Hideyuki TSUBOI, Yuichi OKUYAMA, Akira NAGOYA, },
journal={IEICE TRANSACTIONS on Information},
title={Dynamically Reconfigurable Logic LSI: PCA-2},
year={2004},
volume={E87-D},
number={8},
pages={2011-2020},
abstract={Design points and the results seen in the development of a dynamically reconfigurable logic LSI, PCA-2, are described. PCA-2 enables the realization of flexible parallel processing based on the autonomous reconfiguration of logic circuits. To realize this feature, we introduce an asynchronous circuit design and a homogeneous cell array structure. PCA-2 represents an advance on the earlier LSI, PCA-1. Cutting edge CMOS technology is used to realize the structural merits of PCA hardware. Compared to PCA-1, PCA-2 offers 16 times greater integration level for programmable logic. Due to miniaturization and design refinement, PCA-2 provides a 6-fold increase in the circuit frequency of the configuration controller and a 3-fold increase in the operating frequency of the programmable logic. The results gained confirm the effects of refinement and the suitability of our architecture for device miniaturization.},
keywords={},
doi={},
ISSN={},
month={August},}

Copy

TY - JOUR
TI - Dynamically Reconfigurable Logic LSI: PCA-2
T2 - IEICE TRANSACTIONS on Information
SP - 2011
EP - 2020
AU - Hideyuki ITO
AU - Ryusuke KONISHI
AU - Hiroshi NAKADA
AU - Hideyuki TSUBOI
AU - Yuichi OKUYAMA
AU - Akira NAGOYA
PY - 2004
DO -
JO - IEICE TRANSACTIONS on Information
SN -
VL - E87-D
IS - 8
JA - IEICE TRANSACTIONS on Information
Y1 - August 2004
AB - Design points and the results seen in the development of a dynamically reconfigurable logic LSI, PCA-2, are described. PCA-2 enables the realization of flexible parallel processing based on the autonomous reconfiguration of logic circuits. To realize this feature, we introduce an asynchronous circuit design and a homogeneous cell array structure. PCA-2 represents an advance on the earlier LSI, PCA-1. Cutting edge CMOS technology is used to realize the structural merits of PCA hardware. Compared to PCA-1, PCA-2 offers 16 times greater integration level for programmable logic. Due to miniaturization and design refinement, PCA-2 provides a 6-fold increase in the circuit frequency of the configuration controller and a 3-fold increase in the operating frequency of the programmable logic. The results gained confirm the effects of refinement and the suitability of our architecture for device miniaturization.
ER -