High Throughput Parallelization of AES-CTR Algorithm

Nhat-Phuong TRAN; Myungho LEE; Sugwon HONG; Seung-Jae LEE

doi:10.1587/transinf.E96.D.1685

High Throughput Parallelization of AES-CTR Algorithm

Nhat-Phuong TRAN, Myungho LEE, Sugwon HONG, Seung-Jae LEE

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Data encryption and decryption are common operations in network-based application programs that must offer security. In order to keep pace with the high data input rate of network-based applications such as the multimedia data streaming, real-time processing of the data encryption/decryption is crucial. In this paper, we propose a new parallelization approach to improve the throughput performance for the de-facto standard data encryption and decryption algorithm, AES-CTR (Counter mode of AES). The new approach extends the size of the block encrypted at one time across the unit block boundaries, thus effectively encrypting multiple unit blocks at the same time. This reduces the associated parallelization overheads such as the number of procedure calls, the scheduling and the synchronizations compared with previous approaches. Therefore, this leads to significant throughput performance improvements on a computing platform with a general-purpose multi-core processor and a Graphic Processing Unit (GPU).

Publication: IEICE TRANSACTIONS on Information Vol.E96-D No.8 pp.1685-1695

Publication Date: 2013/08/01

Publicized

Online ISSN: 1745-1361

DOI: 10.1587/transinf.E96.D.1685

Type of Manuscript: PAPER

Category: Fundamentals of Information Systems

Authors

Nhat-Phuong TRAN
  Myongji University
Myungho LEE
  Myongji University
Sugwon HONG
  Myongji University
Seung-Jae LEE
  Myongji University

Keyword

AES, multi-core, GPU, parallelization

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Nhat-Phuong TRAN, Myungho LEE, Sugwon HONG, Seung-Jae LEE, "High Throughput Parallelization of AES-CTR Algorithm" in IEICE TRANSACTIONS on Information, vol. E96-D, no. 8, pp. 1685-1695, August 2013, doi: 10.1587/transinf.E96.D.1685.
Abstract: Data encryption and decryption are common operations in network-based application programs that must offer security. In order to keep pace with the high data input rate of network-based applications such as the multimedia data streaming, real-time processing of the data encryption/decryption is crucial. In this paper, we propose a new parallelization approach to improve the throughput performance for the de-facto standard data encryption and decryption algorithm, AES-CTR (Counter mode of AES). The new approach extends the size of the block encrypted at one time across the unit block boundaries, thus effectively encrypting multiple unit blocks at the same time. This reduces the associated parallelization overheads such as the number of procedure calls, the scheduling and the synchronizations compared with previous approaches. Therefore, this leads to significant throughput performance improvements on a computing platform with a general-purpose multi-core processor and a Graphic Processing Unit (GPU).
URL: https://globals.ieice.org/en_transactions/information/10.1587/transinf.E96.D.1685/_p

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@ARTICLE{e96-d_8_1685,
author={Nhat-Phuong TRAN, Myungho LEE, Sugwon HONG, Seung-Jae LEE, },
journal={IEICE TRANSACTIONS on Information},
title={High Throughput Parallelization of AES-CTR Algorithm},
year={2013},
volume={E96-D},
number={8},
pages={1685-1695},
abstract={Data encryption and decryption are common operations in network-based application programs that must offer security. In order to keep pace with the high data input rate of network-based applications such as the multimedia data streaming, real-time processing of the data encryption/decryption is crucial. In this paper, we propose a new parallelization approach to improve the throughput performance for the de-facto standard data encryption and decryption algorithm, AES-CTR (Counter mode of AES). The new approach extends the size of the block encrypted at one time across the unit block boundaries, thus effectively encrypting multiple unit blocks at the same time. This reduces the associated parallelization overheads such as the number of procedure calls, the scheduling and the synchronizations compared with previous approaches. Therefore, this leads to significant throughput performance improvements on a computing platform with a general-purpose multi-core processor and a Graphic Processing Unit (GPU).},
keywords={},
doi={10.1587/transinf.E96.D.1685},
ISSN={1745-1361},
month={August},}

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TY - JOUR
TI - High Throughput Parallelization of AES-CTR Algorithm
T2 - IEICE TRANSACTIONS on Information
SP - 1685
EP - 1695
AU - Nhat-Phuong TRAN
AU - Myungho LEE
AU - Sugwon HONG
AU - Seung-Jae LEE
PY - 2013
DO - 10.1587/transinf.E96.D.1685
JO - IEICE TRANSACTIONS on Information
SN - 1745-1361
VL - E96-D
IS - 8
JA - IEICE TRANSACTIONS on Information
Y1 - August 2013
AB - Data encryption and decryption are common operations in network-based application programs that must offer security. In order to keep pace with the high data input rate of network-based applications such as the multimedia data streaming, real-time processing of the data encryption/decryption is crucial. In this paper, we propose a new parallelization approach to improve the throughput performance for the de-facto standard data encryption and decryption algorithm, AES-CTR (Counter mode of AES). The new approach extends the size of the block encrypted at one time across the unit block boundaries, thus effectively encrypting multiple unit blocks at the same time. This reduces the associated parallelization overheads such as the number of procedure calls, the scheduling and the synchronizations compared with previous approaches. Therefore, this leads to significant throughput performance improvements on a computing platform with a general-purpose multi-core processor and a Graphic Processing Unit (GPU).
ER -