With the development of LSI technologies, conventional circuit simulation using only single type of method has become unsatisfactory, i.e. circuit-level analysis based on device model spends much simulation time and relaxation methods have the problems on their accuracy. Therefore, it is necessary to develop the better methods to realize both high-speed and good accuracy. In this paper, a mixed-mode circuit-timing simulation method has been studied. It uses a new kind of automatic circuit partition approach--dynamic circuit partition process based on checking coupling factors between circuit nodes at every time point for better convergence. This method is based on examining the characteristic of circuit equations rather than circuit topology or function blocks. A mixed-mode simulation program--MMAPC for transient analysis of CMOS large-scale circuit has been developed and some simulation examples have been performed. The results show that MMAPC can be more than two orders of magnitude faster than a
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Ben CHEN, Mahoki ONODA, Mineo KANEKO, "MMAPC: An Effective Mixed-Mode Circuit Simulator Using Dynamic Circuit Partition Process" in IEICE TRANSACTIONS on transactions,
vol. E71-E, no. 4, pp. 388-393, April 1988, doi: .
Abstract: With the development of LSI technologies, conventional circuit simulation using only single type of method has become unsatisfactory, i.e. circuit-level analysis based on device model spends much simulation time and relaxation methods have the problems on their accuracy. Therefore, it is necessary to develop the better methods to realize both high-speed and good accuracy. In this paper, a mixed-mode circuit-timing simulation method has been studied. It uses a new kind of automatic circuit partition approach--dynamic circuit partition process based on checking coupling factors between circuit nodes at every time point for better convergence. This method is based on examining the characteristic of circuit equations rather than circuit topology or function blocks. A mixed-mode simulation program--MMAPC for transient analysis of CMOS large-scale circuit has been developed and some simulation examples have been performed. The results show that MMAPC can be more than two orders of magnitude faster than a
URL: https://globals.ieice.org/en_transactions/transactions/10.1587/e71-e_4_388/_p
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@ARTICLE{e71-e_4_388,
author={Ben CHEN, Mahoki ONODA, Mineo KANEKO, },
journal={IEICE TRANSACTIONS on transactions},
title={MMAPC: An Effective Mixed-Mode Circuit Simulator Using Dynamic Circuit Partition Process},
year={1988},
volume={E71-E},
number={4},
pages={388-393},
abstract={With the development of LSI technologies, conventional circuit simulation using only single type of method has become unsatisfactory, i.e. circuit-level analysis based on device model spends much simulation time and relaxation methods have the problems on their accuracy. Therefore, it is necessary to develop the better methods to realize both high-speed and good accuracy. In this paper, a mixed-mode circuit-timing simulation method has been studied. It uses a new kind of automatic circuit partition approach--dynamic circuit partition process based on checking coupling factors between circuit nodes at every time point for better convergence. This method is based on examining the characteristic of circuit equations rather than circuit topology or function blocks. A mixed-mode simulation program--MMAPC for transient analysis of CMOS large-scale circuit has been developed and some simulation examples have been performed. The results show that MMAPC can be more than two orders of magnitude faster than a
keywords={},
doi={},
ISSN={},
month={April},}
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TY - JOUR
TI - MMAPC: An Effective Mixed-Mode Circuit Simulator Using Dynamic Circuit Partition Process
T2 - IEICE TRANSACTIONS on transactions
SP - 388
EP - 393
AU - Ben CHEN
AU - Mahoki ONODA
AU - Mineo KANEKO
PY - 1988
DO -
JO - IEICE TRANSACTIONS on transactions
SN -
VL - E71-E
IS - 4
JA - IEICE TRANSACTIONS on transactions
Y1 - April 1988
AB - With the development of LSI technologies, conventional circuit simulation using only single type of method has become unsatisfactory, i.e. circuit-level analysis based on device model spends much simulation time and relaxation methods have the problems on their accuracy. Therefore, it is necessary to develop the better methods to realize both high-speed and good accuracy. In this paper, a mixed-mode circuit-timing simulation method has been studied. It uses a new kind of automatic circuit partition approach--dynamic circuit partition process based on checking coupling factors between circuit nodes at every time point for better convergence. This method is based on examining the characteristic of circuit equations rather than circuit topology or function blocks. A mixed-mode simulation program--MMAPC for transient analysis of CMOS large-scale circuit has been developed and some simulation examples have been performed. The results show that MMAPC can be more than two orders of magnitude faster than a
ER -