An asymmetric Dual Metal Stack Gate (DMSG) SOI MOSFET transistor has been investigated for its enhanced electrical characteristics. A 2-D physical model has been proposed and its results have been confirmed by those obtained by simulation. These results predict better short channel effects such as drain induced barrier lowering (DIBL) characteristics and hot carrier effects for this device compared to those for conventional SOI MOSFETs. The effects of the Stacked Gate (SG) and Dual Metal Gate (DMG) structures on short channel effects are compared. It has been observed that SG reduces DIBL significantly, while DMG prevents the normal roll-off of the threshold voltage reduction.