A dual-core spot size converter (DC-SSC) is integrated with a lateral grating assisted lateral co-directional coupler (LGLC) tunable laser by using no additional complicated fabrication processes. The excess loss due to the DC-SSC is only 0.5 dB, and narrow full width half maximums (FWHMs) of vertical and horizontal far-field patterns (FFPs) produced by the laser are about 25° and 20°. This integration causes no degradations of the performance of the LGLC laser; in other words, it maintains good lasing characteristics, namely, wide tuning range of over 68 nm and SMSR of over 35 dB in the C-band under a 50 semi-cooled condition.

This paper reports on the design and performance of a very fast Track/Hold (T/H) circuit with GaAs Heterojunction Bipolar Transistor (HBT) to precede a 3GS/s 6 bit ADC. The T/H circuit employs a differential open-loop architecture for high-speed operation, and it consists of diode bridge switches, hold capacitors and output buffers. The differential structure as well as the output buffers suppress droop effects due to the small hFE (20) of our HBT. Measured results show that the T/H circuit has better than 6 bit linearity within an input range of 1.0 Vp-p with power dissipation of 990m W, and the bandwidth is 6 GHz in the track mode. The measured droop rate is 2.1mV/ns, the feedthrough is -46 dB 500 MHz and the hold pedestal is less than 10m V. Also a 3 GHz sampling operation of the T/H circuit was measured. The T/H circuit uses 43 HBTs, 24 Schottky barrier diodes and occupies a chip area of 1.4 1.75 mm2. We also describe the design and performance of a variable, gain amplifier with GaAs HBT to precede the T/H circuit as an input buffer and adjust its gain. These results support the possibility of meeting the requirements for a high-speed ADC system.

This paper describes the design and performance of a high-speed 6-bit ADC using SiGe HBT for measuring-instrument applications. We show that the Gummel-Poon model suffices for SiGe HBT modeling and then we describe that the folding/interpolation architecture as well as simple, differential circuit design are suitable for ADC design with SiGe HBT. Measured results show that the nonlinearity of the ADC is within 1/2 LSB, and the effective bits are 5. 2 bits at an input frequency of 100 MHz and 4. 2 bits at 200 MHz with 768 MS/s. We also describe some design issues for folding/interpolation ADC.