In this paper, we present a fully integrated single conversion front-end for a satellite low-noise block down-converter (LNB), focusing on a Ku-band noise-canceling radio frequency amplifier (RF-AMP) and an L-band intermediate frequency variable-gain amplifier (IF-VGA). LNB, which is set on a satellite dish antenna, converts the satellite signal in Ku-band (10.7GHz to 12.75GHz) to L-band (950MHz to 2150MHz). To obtain a lower noise figure (NF) at the high frequency, we implemented a wideband noise-canceling RF-AMP with an LC ladder filter. Furthermore, we implemented a current-reusing RF-AMP and mixer for lower current consumption. The IF-VGA has a constant output third-order intercept point (OIP3) for various gains thanks to a digital control of the gate width in the transconductor stage. We fabricated a single conversion front-end IC using a 1P5M 130-nm RF-CMOS process and achieved NF of 9dB and a constant OIP3 of 11dBm for various gains. The current consumption was 27mA at a 2.8-V supply voltage.

In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. The VCO has a fundamental oscillation frequency range of 131.8 GHz to 134.3 GHz, achieved by controlling the back-gate voltage, which is also used to tune the locking range of divide-by-2 and divide-by-3 dividers. The ratio between the measured VCO oscillation frequencies and output frequencies of dividers is in good agreement with the target ratio. This indicates that the dividers covered the entire VCO oscillation range. We fabricated the VCO and dividers with a chip core area of 180 µm × 100 µm implemented in a 65-nm CMOS process. The total power consumption was 97 mW at a 1.2-V supply voltage.

In this paper, we present a differential dual-modulus prescaler based on an injection-locked frequency divider (ILFD) for satellite low-noise block (LNB) down-converters. We fabricated three-stage differential latches using an ILFD and a cascaded differential divider in a 130-nm CMOS process. The prototype chip core area occupies 40µm × 20µm. The proposed prescaler achieved the locking range of 2.1-10GHz with both divide-by-10 and divide-by-11 operations at a supply voltage of 1.4V. Normalized energy consumptions are 0.4pJ (=mW/GHz) at a 1.4-V supply voltage and 0.24pJ at a 1.2-V supply voltage. To evaluate the tolerance of phase-difference deviation of the input differential pair from the perfect differential phase-difference, 180 degrees, we measured the operational frequencies for various phase-difference inputs. The proposed prescaler achieved the operational frequency range of 2.1-10GHz with an input phase-difference deviation of less than 90 degrees. However, the range of operational frequency decreases as the phase-difference deviation increases beyond 90 degrees and reaches 3.9-7.9GHz for the phase-difference deviation of 180 degrees (i.e. no phase difference). In addition, to confirm the fully locking operation, we measured the spurious noise and the phase noise degradation while reducing the supply voltage. The sensitivity analysis of the prescaler for various supply voltages can explain the above degradation of spectral purity. Spurious noise arises and the phase noise degrades with decreasing supply voltage due to the quasi- and non-locking operations. We verified the fully-locking operation for the LNB down-converter at a 1.4-V supply voltage.

RF Variable Gain Amplifiers (RF-VGA) are important components for integrated TV broadcast receivers. Analog and digital controlled RF-VGAs are compared in terms of linearity and an AGC loop architecture suitable for digitally controlled RF-VGA is proposed. Further linearity enhancement applicable for CMOS implementation is also discussed.