In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. The VCO has a fundamental oscillation frequency range of 131.8 GHz to 134.3 GHz, achieved by controlling the back-gate voltage, which is also used to tune the locking range of divide-by-2 and divide-by-3 dividers. The ratio between the measured VCO oscillation frequencies and output frequencies of dividers is in good agreement with the target ratio. This indicates that the dividers covered the entire VCO oscillation range. We fabricated the VCO and dividers with a chip core area of 180 µm × 100 µm implemented in a 65-nm CMOS process. The total power consumption was 97 mW at a 1.2-V supply voltage.
Takeshi MITSUNAKA
SHARP Corporation,Hiroshima University
Kunihiko IIZUKA
SHARP Corporation
Minoru FUJISHIMA
Hiroshima University
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Takeshi MITSUNAKA, Kunihiko IIZUKA, Minoru FUJISHIMA, "97-mW 8-Phase CMOS VCO and Dividers for a 134-GHz PLL Synthesizer" in IEICE TRANSACTIONS on Electronics,
vol. E98-C, no. 7, pp. 685-692, July 2015, doi: 10.1587/transele.E98.C.685.
Abstract: In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. The VCO has a fundamental oscillation frequency range of 131.8 GHz to 134.3 GHz, achieved by controlling the back-gate voltage, which is also used to tune the locking range of divide-by-2 and divide-by-3 dividers. The ratio between the measured VCO oscillation frequencies and output frequencies of dividers is in good agreement with the target ratio. This indicates that the dividers covered the entire VCO oscillation range. We fabricated the VCO and dividers with a chip core area of 180 µm × 100 µm implemented in a 65-nm CMOS process. The total power consumption was 97 mW at a 1.2-V supply voltage.
URL: https://globals.ieice.org/en_transactions/electronics/10.1587/transele.E98.C.685/_p
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@ARTICLE{e98-c_7_685,
author={Takeshi MITSUNAKA, Kunihiko IIZUKA, Minoru FUJISHIMA, },
journal={IEICE TRANSACTIONS on Electronics},
title={97-mW 8-Phase CMOS VCO and Dividers for a 134-GHz PLL Synthesizer},
year={2015},
volume={E98-C},
number={7},
pages={685-692},
abstract={In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. The VCO has a fundamental oscillation frequency range of 131.8 GHz to 134.3 GHz, achieved by controlling the back-gate voltage, which is also used to tune the locking range of divide-by-2 and divide-by-3 dividers. The ratio between the measured VCO oscillation frequencies and output frequencies of dividers is in good agreement with the target ratio. This indicates that the dividers covered the entire VCO oscillation range. We fabricated the VCO and dividers with a chip core area of 180 µm × 100 µm implemented in a 65-nm CMOS process. The total power consumption was 97 mW at a 1.2-V supply voltage.},
keywords={},
doi={10.1587/transele.E98.C.685},
ISSN={1745-1353},
month={July},}
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TY - JOUR
TI - 97-mW 8-Phase CMOS VCO and Dividers for a 134-GHz PLL Synthesizer
T2 - IEICE TRANSACTIONS on Electronics
SP - 685
EP - 692
AU - Takeshi MITSUNAKA
AU - Kunihiko IIZUKA
AU - Minoru FUJISHIMA
PY - 2015
DO - 10.1587/transele.E98.C.685
JO - IEICE TRANSACTIONS on Electronics
SN - 1745-1353
VL - E98-C
IS - 7
JA - IEICE TRANSACTIONS on Electronics
Y1 - July 2015
AB - In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. The VCO has a fundamental oscillation frequency range of 131.8 GHz to 134.3 GHz, achieved by controlling the back-gate voltage, which is also used to tune the locking range of divide-by-2 and divide-by-3 dividers. The ratio between the measured VCO oscillation frequencies and output frequencies of dividers is in good agreement with the target ratio. This indicates that the dividers covered the entire VCO oscillation range. We fabricated the VCO and dividers with a chip core area of 180 µm × 100 µm implemented in a 65-nm CMOS process. The total power consumption was 97 mW at a 1.2-V supply voltage.
ER -