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Koji TAKINAMI Junji SATO Takahiro SHIMA Mitsuhiro IWAMOTO Taiji AKIZUKI Masashi KOBAYASHI Masaki KANEMARU Yohei MORISHITA Ryo KITAMURA Takayuki TSUKIZAWA Koichi MIZUNO Noriaki SAITO Kazuaki TAKAHASHI
A 60 GHz direct conversion transceiver which employs amplitude/phase imbalance cancellation technique is newly proposed. By using the proposed technique, the receive path of the transceiver achieves less than 0.2 dB of amplitude error and less than 3 of phase error at 60 GHz bands over a 10 GHz bandwidth, which relaxes the design accuracy required for baluns used in the transceiver. It also employs a simple and fast calibration algorithm to adjust the locking range of the divide-by-3 injection locked divider in the phase locked loop. Fabricated in 90 nm CMOS technology, the transceiver achieves a low power consumption of 230 mW in transmit mode and 173 mW in receive mode. The output spectrum of 1.76 Gsps π/2-BPSK/QPSK modulation shows the excellent distortion and spurious suppression that meet the IEEE802.11ad draft standard.
Toshihiko ITO Masaki KANEMARU Satoshi FURUYA Dong TA NGOC HUY Kenichi OKADA Akira MATSUZAWA
This paper presents a multi-band WCDMA receiver consisting of a multi-band low noise amplifier (LNA), a multi-band mixer and an inter-stage tunable notch filter. The notch filter is used to suppress Tx leakage, and 0.8–1.5 GHz (66%) of tuning range is achieved. The receiver achieves 33 and 30 dB conversion gain, 6.4 and 8 dB NF, 50 and 35.5 dBm IIP2, and -6 and -4.7 dBm IIP3 at 0.8 and 1.5 GHz, respectively. The power consumption is 121 mW from a 1.8-V power supply. The receiver is implemented in a 0.18-µm CMOS process.