We have developed an OC-48c (2.4 Gbps) PCI-compliant network interface card and drivers with the aim of evaluating the effectiveness of our proposed link layer protocol MAPOS. In this paper, we study the effectiveness of MAPOS particularly from the viewpoint of the influence of packet sizes up to the 64-kbyte jumbo MTU size and the effectiveness of our new implementation of the non-interrupt-driven sending process and interrupt batching receiving process deployed to improve the throughput in short-packet transmissions. Our main findings are as follows; Enlarging the packet size up to 64-kbyte MTU improves the performance in transmission. OC-48c wire speed is achieved with packet sizes larger than 16 kbytes. Implementation of the non-interrupt-driven sending process and the interrupt batching receiving process improves the performance of short-packet transmission. In particular, the transmission throughput is improved by 50% when 64-byte short packets are used. The maximum loss-free receive rate is also raised by 50% when 4-kbyte packets arrive. With a high-performance CPU, the data-transfer speed of the DMA controller for jumbo packets cannot keep up with the packet-queueing speed of the CPU. Our proposed procedure for adaptive algorithm switching method can resolve this problem. The maximum TCP throughput observed in our measurement using the latest PCs and MAPOS OC-48c PCI card was 2342.5 Mbps. This throughput represents the highest performance in a legacy-PCI-based system according to the results database of the benchmarking software.

To apply network monitoring functions to emerging high-quality video streaming services, we proposed an application-coexistent monitor (APCM). In APCM, a streaming server can works as an active monitor and a passive monitor. In addition, IP packets sent from the server carry monitoring information together with application's data such as video signals. To achieve APCM on a 10-Gbps network, we developed a network interface card for an application-coexistent wire-rate network monitor (AWING NIC). It provides (1) a function to append GPS-based accurate timestamps to every packet that streaming applications send and receive, which can be used for real-time monitoring of delays and inter-packet gap, and (2) functions to capture and generate 10-Gbps wire-rate traffic without depending on packets' size, achieved by our highly-efficient DMA-transfer mechanisms. Such monitoring capability are unprecedented in existing PC-based systems because of the limitation in PC system's architecture. As an evaluation of APCM in an actual network, we conducted an experiment to transmit a 6-Gbps high-quality video stream over an IP network with the system in which we installed the AWING NIC. The results revealed that the video stream became highly bursty by passing through the network, and the observed smallest inter-packet gap corresponds to the value of 10-Gbps wire-rate traffic, which supports the effectiveness of our development.

Three techniques are proposed for reducing the time required for protocol processing: protocol data unit management using page management, assembly and disassembly of data packet header and contents in hardware, and rescheduling of protocol processing. These techniques were shown to be feasible by applying them to the TCP/IP over a fiber-distributed data interface network. The maximum communication throughput was 91.6 Mbps; the total throughput for 64 sessions was 89.6 Mbps, only 2% less than the maximum. These techniques will enable the development of more effcient video-on -demand systems.

A parallel IP router that uses off-the-shelf wor-kstations and interconnecting switches is presented. This router, called CORErouter-I, is a medium-grained, functionally distributed parallel system consisting of four kinds of processors for routing, routing-table searching, servicing, and line interfacing. Also discussed are issues related to the implementation of CORErouter-I, especially in terms of routing protocol processing and packet-forwarding. Performance characteristics of CORErouter-I are also clarified through several experiments performed to evaluate maximum throughput, analyze packet-forwarding time, and estimate the effect of parallel processing on the route-flapping problem.

This paper describes a crossbar-switch arbiter for a high-speed MAPOS switch. The arbiter uses the following techniques suitable for variable-length frame switching: 1. parallel processing for handling requests from network interfaces and for resource allocation, 2. techniques such as release-on-request, fast back-to-back transfer, and request prefetching to reduce the arbitration overhead, and 3. a resource sampling technique to enable efficient one-shot multicast processing. Our simulation-based performance evaluation and estimation of the scale of its logic circuits indicated that this arbiter can be implemented through simple hardware.

A universal coding scheme for information from i.i.d., arbitrarily varying sources, or memoryless correlated sources is constructed using LDPC matrices and shown to have an exponential upper bound of decoding error probability. As a corollary, we construct a universal code for the noisy channel model, which is not necessarily BSC. Simulation results show universality of the code with sum-product decoding, and presence of a gap between the error exponent obtained by simulation and that obtained theoretically.